3 * Universal Host Controller Interface
13 #define MAX_CONTROLLERS 4
17 int UHCI_Initialise();
19 int UHCI_IOCtl(tVFS_Node *node, int id, void *data);
20 int UHCI_Int_InitHost(tUHCI_Controller *Host);
23 tUHCI_TD gaUHCI_TDPool[NUM_TDs];
24 tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];
28 * \fn int UHCI_Initialise()
29 * \brief Called to initialise the UHCI Driver
31 int UHCI_Initialise(const char **Arguments)
38 // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices
39 while( (id = PCI_GetDeviceByClass(0x0C03, 0xFFFF, id)) >= 0 && i < MAX_CONTROLLERS )
41 tUHCI_Controller *cinfo = &gUHCI_Controllers[i];
42 // NOTE: Check "protocol" from PCI?
45 // Assign a port range (BAR4, Reserve 32 ports)
46 cinfo->IOBase = PCI_GetBAR(id, 4);
47 if( !(cinfo->IOBase & 1) ) {
48 Log_Warning("UHCI", "MMIO is not supported");
51 cinfo->IRQNum = PCI_GetIRQ(id);
53 Log_Debug("UHCI", "Controller PCI #%i: IO Base = 0x%x, IRQ %i",
54 id, cinfo->IOBase, cinfo->IRQNum);
57 ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);
66 if(i == MAX_CONTROLLERS) {
67 Log_Warning("UHCI", "Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");
74 * \fn void UHCI_Cleanup()
75 * \brief Called just before module is unloaded
82 * \brief Send a transaction to the USB bus
83 * \param ControllerID Controller
84 * \param Fcn Function Address
85 * \param Endpt Endpoint
87 int UHCI_int_SendTransaction(int ControllerID, int Fcn, int Endpt, int DataTgl, Uint8 Type, void *Data, size_t Length)
89 tUHCI_Controller *cont = &gUHCI_Controllers[ControllerID];
92 if( Length > 0x400 ) return -1; // Controller allows up to 0x500, but USB doesn't
94 td = UHCI_Int_AllocateTD(cont);
97 td->Control = (Length - 1) & 0x7FF;
98 td->Token = ((Length - 1) & 0x7FF) << 21;
99 td->Token |= (DataTgl & 1) << 19;
100 td->Token |= (Endpt & 0xF) << 15;
101 td->Token |= (Fcn & 0xFF) << 8;
104 if( ((tVAddr)Data & PAGE_SIZE) + Length > PAGE_SIZE ) {
105 Log_Warning("UHCI", "TODO: Support non single page transfers");
106 // td->BufferPointer =
110 td->BufferPointer = MM_GetPhysAddr(Data);
113 UHCI_int_AppendTD(td);
115 // Wait until done, then return
119 int UHCI_DataIN(int ControllerID, int Fcn, int Endpt, int DataTgl, void *Data, size_t Length)
121 return UHCI_int_SendPacket(ControllerID, Fcn, Endpt, DataTgl, 0x69, Data, Length);
124 int UHCI_DataOUT(int ControllerID, int Fcn, int Endpt, int DataTgl, void *Data, size_t Length)
126 return UHCI_int_SendPacket(ControllerID, Fcn, Endpt, DataTgl, 0xE1, Data, Length);
129 int UHCI_SendSetup(int ControllerID, int Fcn, int Endpt, int DataTgl, void *Data, size_t Length)
131 return UHCI_int_SendPacket(ControllerID, Fcn, Endpt, DataTgl, 0x2D, Data, Length);
134 // === INTERNAL FUNCTIONS ===
136 * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)
137 * \brief Initialises a UHCI host controller
138 * \param Host Pointer - Host to initialise
140 int UHCI_Int_InitHost(tUHCI_Controller *Host)
142 ENTER("pHost", Host);
144 outw( Host->IOBase + USBCMD, 4 ); // GRESET
145 // TODO: Wait for at least 10ms
146 outw( Host->IOBase + USBCMD, 0 ); // GRESET
148 // Allocate Frame List
149 // - 1 Page, 32-bit address
150 // - 1 page = 1024 4 byte entries
151 Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
152 if( !Host->FrameList ) {
153 Log_Warning("UHCI", "Unable to allocate frame list, aborting");
157 LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);
158 memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)
160 //! \todo Properly fill frame list
162 // Set frame length to 1 ms
163 outb( Host->IOBase + SOFMOD, 64 );
165 // Set Frame List Address
166 outd( Host->IOBase + FLBASEADD, Host->PhysFrameList );
169 outw( Host->IOBase + FRNUM, 0 );
172 //PCI_WriteWord( Host->PciId, 0xC0, 0x2000 );