3 * - By John Hodge (thePowersGang)
13 Uint8 CapLength; // Byte offset of Operational registers
15 Uint16 HCIVersion; // BCD Version
17 * Structural Parameters
19 * 0: 3 = Number of ports on this controller
20 * 4 = Port Power Control
21 * 5: 6 = Reserved (ZERO)
22 * 7 = Port Routing Rules
23 * 8:11 = Number of ports per companion controller
24 * 12:15 = Number of companion controllers
25 * 16 = Port Indicators
26 * 17:19 = Reserved (ZERO)
27 * 20:23 = Debug Port Number
28 * 24:31 = Reserved (ZERO)
32 * Capability Parameters
34 * 0 = 64-bit Addressing Capability
35 * 1 = Programmable Frame List Flag
36 * 2 = Asyncronous Schedule Park Capability
38 * 4: 7 = Isochronous Scheduling Threshold
39 * 8:15 = EHCI Extended Capabilitys Pointer (0 = None)
40 * 16:31 = Reserved (ZERO)
44 * Companion Port Route Description
52 * USB Command Register
54 * 0 = Run/Stop (Stop, Run)
55 * 1 = Host Controller Reset
56 * 2: 3 = Frame List Size (1024 entries, 512, 256, Reserved)
57 * 4 = Periodic Schedule Enable
58 * 5 = Asynchronous Schedule Enable
59 * 6 = Interrupt on Async Advance Doorbell
60 * 7 = Light Host Controller Reset
61 * 8: 9 = Asynchronous Schedule Park Mode Count
62 * 10 = Reserved (ZERO)
63 * 11 = Asynchronous Schedule Park Mode Enable
64 * 12:15 = Reserved (ZERO)
65 * 16:23 = Interrupt Threshold Control
66 * 31:24 = Reserved (ZERO)
73 * 1 = USB Error Interrupt
74 * 2 = Port Change Detect
75 * 3 = Frame List Rollover
76 * 4 = Host System Error
77 * 5 = Interrupt on Async Advance
78 * 6:11 = Reserved (ZERO)
81 * 14 = Periodic Schedule Status
82 * 15 = Asynchronous Schedule Status
83 * 16:31 = Reserved ?(Zero)
87 * USB Interrupt Enable Register
89 * 0 = USB Interrupt Enable
90 * 1 = USB Error Interrupt Enable
91 * 2 = Port Change Interrupt Enable
92 * 3 = Frame List Rollover Enable
93 * 4 = Host System Error Enable
94 * 5 = Interrupt on Async Advance Enable
95 * 6:31 = Reserved (Zero)
99 * Current microframe number (14 bits)
101 * Bits 14:3 are used as n index into PeridocListBase
105 * Control Data Structure Segment Register
107 * Most significant 32-bits of all addresses (only used if "64-bit addressing capability" is set)
109 Uint32 CtrlDSSegment;
111 * Periodic Frame List Base Address Register
113 Uint32 PeridocListBase;
115 * Current Asynchronous List Address Register
117 Uint32 AsyncListAddr;
119 Uint32 _resvd[(0x40-0x1C)/4];
121 * Configure Flag Register
123 * - When 0, all ports are routed to a USB1.1 controller
125 * 0 = Configure Flag - Driver sets when controller is configured
126 * 1:31 = Reserved (ZERO)
130 * Port Status and Control Register
132 * 0 = Current Connect Status
133 * 1 = Connect Status Change
135 * 3 = Port Enable Change
136 * 4 = Over-current Active
137 * 5 = Over-current change
138 * 6 = Force Port Resume
141 * 9 = Reserved (ZERO)
142 * 10:11 = Line Status (Use to detect non USB2) [USB2, USB2, USB1.1, USB2]
144 * 13 = Port Owner (Set to 1 to give to companion controller)
145 * 14:15 = Port Indicator Control (Off, Amber, Green, Undef)
146 * 16:19 = Port Test Control
147 * 20 = Wake on Connect Enable
148 * 21 = Wake on Disconnect Enable
149 * 22 = Wake on Over-current Enable
150 * 23:31 = Reserved (ZERO)