3 * - By John Hodge (thePowersGang)
5 * Universal Host Controller Interface
8 #define VERSION VER2(0,5)
17 #define MAX_CONTROLLERS 4
21 int UHCI_Initialise();
23 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont);
24 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD);
25 void *UHCI_int_SendTransaction(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *Data, size_t Length);
26 void *UHCI_DataIN(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length);
27 void *UHCI_DataOUT(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length);
28 void *UHCI_SendSetup(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length);
29 int UHCI_IsTransferComplete(void *Ptr, void *Handle);
30 int UHCI_Int_InitHost(tUHCI_Controller *Host);
31 void UHCI_CheckPortUpdate(void *Ptr);
32 void UHCI_InterruptHandler(int IRQ, void *Ptr);
35 MODULE_DEFINE(0, VERSION, USB_UHCI, UHCI_Initialise, NULL, "USB_Core", NULL);
36 tUHCI_TD gaUHCI_TDPool[NUM_TDs];
37 tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];
38 tUSBHostDef gUHCI_HostDef = {
39 .SendIN = UHCI_DataIN,
40 .SendOUT = UHCI_DataOUT,
41 .SendSETUP = UHCI_SendSetup,
42 .CheckPorts = UHCI_CheckPortUpdate,
43 .IsOpComplete = UHCI_IsTransferComplete
48 * \fn int UHCI_Initialise()
49 * \brief Called to initialise the UHCI Driver
51 int UHCI_Initialise(const char **Arguments)
58 // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices
59 while( (id = PCI_GetDeviceByClass(0x0C03, 0xFFFF, id)) >= 0 && i < MAX_CONTROLLERS )
61 tUHCI_Controller *cinfo = &gUHCI_Controllers[i];
62 // NOTE: Check "protocol" from PCI?
65 cinfo->IOBase = PCI_GetBAR(id, 4);
66 if( !(cinfo->IOBase & 1) ) {
67 Log_Warning("UHCI", "MMIO is not supported");
71 cinfo->IRQNum = PCI_GetIRQ(id);
73 Log_Debug("UHCI", "Controller PCI #%i: IO Base = 0x%x, IRQ %i",
74 id, cinfo->IOBase, cinfo->IRQNum);
76 IRQ_AddHandler(cinfo->IRQNum, UHCI_InterruptHandler, cinfo);
79 ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);
86 cinfo->RootHub = USB_RegisterHost(&gUHCI_HostDef, cinfo, 2);
87 LOG("cinfo->RootHub = %p", cinfo->RootHub);
89 UHCI_CheckPortUpdate(cinfo);
93 if(i == MAX_CONTROLLERS) {
94 Log_Warning("UHCI", "Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");
96 LEAVE('i', MODULE_ERR_OK);
101 * \fn void UHCI_Cleanup()
102 * \brief Called just before module is unloaded
108 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont)
111 for(i = 0; i < NUM_TDs; i ++)
113 if(gaUHCI_TDPool[i].Link == 0) {
114 gaUHCI_TDPool[i].Link = 1;
115 gaUHCI_TDPool[i].Control = 1 << 23;
116 return &gaUHCI_TDPool[i];
118 // Still in use? Skip
119 if( gaUHCI_TDPool[i].Control & (1 << 23) )
121 // Is there a callback on it? Skip
122 if( gaUHCI_TDPool[i]._info.Callback )
124 // TODO: Garbage collect, but that means removing from the list too
126 // Ok, this is actually unused
127 gaUHCI_TDPool[i].Link = 1;
128 gaUHCI_TDPool[i].Control = 1 << 23;
129 return &gaUHCI_TDPool[i];
135 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD)
137 int next_frame = (inw(Cont->IOBase + FRNUM) + 2) & (1024-1);
138 tPAddr td_pool_base = MM_GetPhysAddr( (tVAddr)gaUHCI_TDPool );
142 // TODO: How to handle FRNUM incrementing while we are in this function?
145 if( Cont->FrameList[next_frame] & 1 )
147 // TODO: Ensure 32-bit paddr
148 Cont->FrameList[next_frame] = MM_GetPhysAddr( (tVAddr)TD );
149 LOG("next_frame = %i", next_frame);
153 // Find the end of the list
154 link = Cont->FrameList[next_frame];
156 // TODO: Fix this to work with a non-contiguous pool
157 prev_td = gaUHCI_TDPool + (link - td_pool_base) / sizeof(gaUHCI_TDPool[0]);
158 link = prev_td->Link;
159 } while( !(link & 1) );
162 prev_td->Link = MM_GetPhysAddr( (tVAddr)TD );
164 LOG("next_frame = %i, prev_td = %p", next_frame, prev_td);
168 * \brief Send a transaction to the USB bus
169 * \param Cont Controller pointer
170 * \param Addr Function Address * 16 + Endpoint
171 * \param bTgl Data toggle value
173 void *UHCI_int_SendTransaction(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *Data, size_t Length)
177 if( Length > 0x400 ) return NULL; // Controller allows up to 0x500, but USB doesn't
179 td = UHCI_int_AllocateTD(Cont);
183 Log_Error("UHCI", "No avaliable TDs, transaction dropped");
188 td->Control = (Length - 1) & 0x7FF;
189 td->Control |= (1 << 23);
190 td->Token = ((Length - 1) & 0x7FF) << 21;
191 td->Token |= (bTgl & 1) << 19;
192 td->Token |= (Addr & 0xF) << 15;
193 td->Token |= ((Addr/16) & 0xFF) << 8;
196 // TODO: Ensure 32-bit paddr
197 if( ((tVAddr)Data & (PAGE_SIZE-1)) + Length > PAGE_SIZE ) {
198 Log_Warning("UHCI", "TODO: Support non single page transfers (%x + %x > %x)",
199 (tVAddr)Data & (PAGE_SIZE-1), Length, PAGE_SIZE
201 // TODO: Need to enable IOC to copy the data back
202 // td->BufferPointer =
206 td->BufferPointer = MM_GetPhysAddr( (tVAddr)Data );
209 // Interrupt on completion
211 td->Control |= (1 << 24);
212 td->_info.Callback = Cb; // NOTE: if ERRPTR then the TD is kept allocated until checked
215 Log_Warning("UHCI", "TODO: Support IOC... somehow");
219 td->_info.DestPtr = Data;
221 UHCI_int_AppendTD(Cont, td);
226 void *UHCI_DataIN(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length)
228 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0x69, DataTgl, Cb, Data, Length);
231 void *UHCI_DataOUT(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length)
233 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0xE1, DataTgl, Cb, Data, Length);
236 void *UHCI_SendSetup(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *Data, size_t Length)
238 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0x2D, DataTgl, Cb, Data, Length);
241 int UHCI_IsTransferComplete(void *Ptr, void *Handle)
243 tUHCI_TD *td = Handle;
244 return !(td->Control & (1 << 23));
247 // === INTERNAL FUNCTIONS ===
249 * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)
250 * \brief Initialises a UHCI host controller
251 * \param Host Pointer - Host to initialise
253 int UHCI_Int_InitHost(tUHCI_Controller *Host)
255 ENTER("pHost", Host);
257 outw( Host->IOBase + USBCMD, 4 ); // GRESET
259 // TODO: Wait for at least 10ms
260 outw( Host->IOBase + USBCMD, 0 ); // GRESET
262 // Allocate Frame List
263 // - 1 Page, 32-bit address
264 // - 1 page = 1024 4 byte entries
265 Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
266 if( !Host->FrameList ) {
267 Log_Warning("UHCI", "Unable to allocate frame list, aborting");
271 LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);
272 memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)
274 //! \todo Properly fill frame list
276 // Set frame length to 1 ms
277 outb( Host->IOBase + SOFMOD, 64 );
280 outd( Host->IOBase + FLBASEADD, Host->PhysFrameList );
281 outw( Host->IOBase + FRNUM, 0 );
284 outw( Host->IOBase + USBINTR, 0x000F );
285 PCI_ConfigWrite( Host->PciId, 0xC0, 2, 0x2000 );
288 outw( Host->IOBase + USBCMD, 0x0001 );
294 void UHCI_CheckPortUpdate(void *Ptr)
296 tUHCI_Controller *Host = Ptr;
298 for( int i = 0; i < 2; i ++ )
300 int port = Host->IOBase + PORTSC1 + i*2;
301 // Check for port change
302 if( !(inw(port) & 0x0002) ) continue;
305 // Check if the port is connected
306 if( !(inw(port) & 1) )
308 // Tell the USB code it's gone.
309 USB_DeviceDisconnected(Host->RootHub, i);
314 LOG("Port %i has something", i);
315 // Reset port (set bit 9)
317 outw( port, 0x0200 );
318 Time_Delay(50); // 50ms delay
319 outw( port, inw(port) & ~0x0200 );
322 Time_Delay(50); // 50ms delay
323 outw( port, inw(port) | 0x0004 );
324 // Tell USB there's a new device
325 USB_DeviceConnected(Host->RootHub, i);
330 void UHCI_InterruptHandler(int IRQ, void *Ptr)
332 tUHCI_Controller *Host = Ptr;
333 Uint16 status = inw(Host->IOBase + USBSTS);
334 Log_Debug("UHCI", "UHIC Interrupt, status = 0x%x", status);
338 // Interrupt-on-completion
341 outw(Host->IOBase + USBSTS, status);