4 * - Universal Host Controller Interface
10 typedef struct sUHCI_Controller tUHCI_Controller;
11 typedef struct sUHCI_TD tUHCI_TD;
12 typedef struct sUHCI_QH tUHCI_QH;
15 struct sUHCI_Controller
18 * \brief PCI Device ID
23 * \brief IO Base Address
28 * \brief Memory Mapped-IO base address
33 * \brief IRQ Number assigned to the device
38 * \brief Number of the last frame to be cleaned
45 * 31:4 - Frame Pointer
48 * 0 - Terminate (Empty Pointer)
53 * \brief Physical Address of the Frame List
63 * \brief Next Entry in list
67 * 2 - Depth/Breadth Select
69 * 0 - Terminate (Last in List)
74 * \brief Control and Status Field
77 * 29 - Short Packet Detect (Input Only)
78 * 28:27 - Number of Errors Allowed
79 * 26 - Low Speed Device (Communicating with a low speed device)
80 * 25 - Isynchonious Select
81 * 24 - Interrupt on Completion (IOC)
85 * 21 - Data Buffer Error
86 * 20 - Babble Detected
88 * 18 - CRC/Timout Error
92 * 10:0 - Actual Length (Number of bytes transfered)
97 * \brief Packet Header
99 * 31:21 - Maximum Length (0=1, Max 0x4FF, 0x7FF=0)
103 * 14:8 - Device Address
104 * 7:0 - PID (Packet Identifcation) - Only 96, E1, 2D allowed
113 * \brief Pointer to the data to send
115 Uint32 BufferPointer;
124 } __attribute__((aligned(16)));
129 * \brief Next Entry in list
134 * 0 - Terminate (Last in List)
140 * \brief Next Entry in list
145 * 0 - Terminate (Last in List)
150 // === ENUMERATIONS ===
153 * \brief USB Command Register
156 * 7 - Maximum Packet Size selector (1: 64 bytes, 0: 32 bytes)
157 * 6 - Configure Flag (No Hardware Effect)
158 * 5 - Software Debug (Don't think it will be needed)
159 * 4 - Force Global Resume
160 * 3 - Enter Global Suspend Mode
161 * 2 - Global Reset (Resets all devices on the bus)
162 * 1 - Host Controller Reset (Reset just the controller)
167 * \brief USB Status Register
170 * 5 - HC Halted, set to 1 when USBCMD:RS is set to 0
171 * 4 - Host Controller Process Error (Errors related to the bus)
172 * 3 - Host System Error (Errors related to the OS/PCI Bus)
173 * 2 - Resume Detect (Set if a RESUME command is sent to the Controller)
174 * 1 - USB Error Interrupt
175 * 0 - USB Interrupts (Set if a transaction with the IOC bit set is completed)
179 * \brief USB Interrupt Enable Register
182 * 3 - Short Packet Interrupt Enable
183 * 2 - Interrupt on Complete (IOC) Enable
184 * 1 - Resume Interrupt Enable
185 * 0 - Timout / CRC Error Interrupt Enable
189 * \brief Frame Number (Index into the Frame List)
192 * 10:0 - Index (Incremented each approx 1ms)
196 * \brief Frame List Base Address
198 * 31:12 - Pysical Address >> 12
199 * 11:0 - Reserved (Set to Zero)
201 FLBASEADD = 0x08, // 32-bit
203 * \brief Start-of-frame Modify Register
206 * Sets the size of a frame
207 * Frequency = (11936+n)/12000 kHz
212 SOFMOD = 0x0C, // 8bit
214 * \brief Port Status and Controll Register (Port 1)
220 * 8 - Low Speed Device Attached
222 * 3 - Port Enable/Disable Change - Used for detecting device removal
223 * 2 - Port Enable/Disable
224 * 1 - Connect Status Change
225 * 0 - Current Connect Status
229 * \brief Port Status and Controll Register (Port 2)