4 * - Universal Host Controller Interface
10 typedef struct sUHCI_Controller tUHCI_Controller;
11 typedef struct sUHCI_TD tUHCI_TD;
12 typedef struct sUHCI_QH tUHCI_QH;
15 struct sUHCI_Controller
18 * \brief PCI Device ID
23 * \brief IO Base Address
28 * \brief IRQ Number assigned to the device
35 * 31:4 - Frame Pointer
38 * 0 - Terminate (Empty Pointer)
43 * \brief Physical Address of the Frame List
53 * \brief Next Entry in list
57 * 2 - Depth/Breadth Select
59 * 0 - Terminate (Last in List)
64 * \brief Control and Status Field
67 * 29 - Short Packet Detect (Input Only)
68 * 28:27 - Number of Errors Allowed
69 * 26 - Low Speed Device (Communicating with a low speed device)
70 * 25 - Isynchonious Select
71 * 24 - Interrupt on Completion (IOC)
75 * 21 - Data Buffer Error
76 * 20 - Babble Detected
78 * 18 - CRC/Timout Error
82 * 10:0 - Actual Length (Number of bytes transfered)
87 * \brief Packet Header
89 * 31:21 - Maximum Length (0=1, Max 0x4FF, 0x7FF=0)
93 * 14:8 - Device Address
94 * 7:0 - PID (Packet Identifcation) - Only 96, E1, 2D allowed
103 * \brief Pointer to the data to send
105 Uint32 BufferPointer;
114 } __attribute__((aligned(16)));
119 * \brief Next Entry in list
124 * 0 - Terminate (Last in List)
130 * \brief Next Entry in list
135 * 0 - Terminate (Last in List)
140 // === ENUMERATIONS ===
143 * \brief USB Command Register
146 * 7 - Maximum Packet Size selector (1: 64 bytes, 0: 32 bytes)
147 * 6 - Configure Flag (No Hardware Effect)
148 * 5 - Software Debug (Don't think it will be needed)
149 * 4 - Force Global Resume
150 * 3 - Enter Global Suspend Mode
151 * 2 - Global Reset (Resets all devices on the bus)
152 * 1 - Host Controller Reset (Reset just the controller)
157 * \brief USB Status Register
160 * 5 - HC Halted, set to 1 when USBCMD:RS is set to 0
161 * 4 - Host Controller Process Error (Errors related to the bus)
162 * 3 - Host System Error (Errors related to the OS/PCI Bus)
163 * 2 - Resume Detect (Set if a RESUME command is sent to the Controller)
164 * 1 - USB Error Interrupt
165 * 0 - USB Interrupts (Set if a transaction with the IOC bit set is completed)
169 * \brief USB Interrupt Enable Register
172 * 3 - Short Packet Interrupt Enable
173 * 2 - Interrupt on Complete (IOC) Enable
174 * 1 - Resume Interrupt Enable
175 * 0 - Timout / CRC Error Interrupt Enable
179 * \brief Frame Number (Index into the Frame List)
182 * 10:0 - Index (Incremented each approx 1ms)
186 * \brief Frame List Base Address
188 * 31:12 - Pysical Address >> 12
189 * 11:0 - Reserved (Set to Zero)
191 FLBASEADD = 0x08, // 32-bit
193 * \brief Start-of-frame Modify Register
196 * Sets the size of a frame
197 * Frequency = (11936+n)/12000 kHz
202 SOFMOD = 0x0C, // 8bit
204 * \brief Port Status and Controll Register (Port 1)
210 * 8 - Low Speed Device Attached
212 * 3 - Port Enable/Disable Change - Used for detecting device removal
213 * 2 - Port Enable/Disable
214 * 1 - Connect Status Change
215 * 0 - Current Connect Status
219 * \brief Port Status and Controll Register (Port 2)