2 * UDI Ne2000 NIC Driver
3 * By John Hodge (thePowersGang)
8 #define UDI_VERSION 0x101
9 #define UDI_NIC_VERSION 0x101
12 #include "ne2000_common.h"
31 #define NE2K_NUM_INTR_EVENT_CBS 4
34 // --- Programmed IO ---
35 #include "ne2000_pio.h"
39 void ne2k_usage_ind(udi_usage_cb_t *cb, udi_ubit8_t resource_level)
41 ne2k_rdata_t *rdata = UDI_GCB(cb)->context;
43 rdata->rx_next_page = NE2K_RX_FIRST_PG;
47 void ne2k_enumerate_req(udi_enumerate_cb_t *cb, udi_ubit8_t enumeration_level)
49 ne2k_rdata_t *rdata = UDI_GCB(cb)->context;
50 udi_instance_attr_list_t *attr_list = cb->attr_list;
52 switch(enumeration_level)
54 case UDI_ENUMERATE_START:
55 case UDI_ENUMERATE_START_RESCAN:
56 // Emit the ND binding
57 DPT_SET_ATTR32(attr_list, "if_num", 0);
59 DPT_SET_ATTR_STRING(attr_list, "if_media", "eth", 3);
61 NE2K_SET_ATTR_STRFMT(attr_list, "identifier", 2*6+1, "%02X%02X%02X%02X%02X%02X",
62 rdata->macaddr[0], rdata->macaddr[1], rdata->macaddr[2],
63 rdata->macaddr[3], rdata->macaddr[4], rdata->macaddr[5] );
65 cb->attr_valid_length = attr_list - cb->attr_list;
66 udi_enumerate_ack(cb, UDI_ENUMERATE_OK, NE2K_OPS_CTRL);
68 case UDI_ENUMERATE_NEXT:
69 udi_enumerate_ack(cb, UDI_ENUMERATE_DONE, 0);
73 void ne2k_devmgmt_req(udi_mgmt_cb_t *cb, udi_ubit8_t mgmt_op, udi_ubit8_t parent_ID)
76 void ne2k_final_cleanup_req(udi_mgmt_cb_t *cb)
80 void ne2k_bus_dev_channel_event_ind(udi_channel_event_cb_t *cb)
82 udi_cb_t *gcb = UDI_GCB(cb);
83 ne2k_rdata_t *rdata = gcb->context;
87 case UDI_CHANNEL_CLOSED:
89 case UDI_CHANNEL_BOUND: {
90 rdata->active_cb = gcb;
91 udi_bus_bind_cb_t *bus_bind_cb = UDI_MCB(cb->params.parent_bound.bind_cb, udi_bus_bind_cb_t);
92 udi_bus_bind_req( bus_bind_cb );
93 // continue at ne2k_bus_dev_bus_bind_ack
97 void ne2k_bus_dev_bus_bind_ack(udi_bus_bind_cb_t *cb,
98 udi_dma_constraints_t dma_constraints, udi_ubit8_t perferred_endianness, udi_status_t status)
100 udi_cb_t *gcb = UDI_GCB(cb);
101 ne2k_rdata_t *rdata = gcb->context;
103 // Set up PIO handles
104 rdata->init.pio_index = -1;
105 ne2k_bus_dev_bind__pio_map(gcb, UDI_NULL_PIO_HANDLE);
107 void ne2k_bus_dev_bind__pio_map(udi_cb_t *gcb, udi_pio_handle_t new_pio_handle)
109 ne2k_rdata_t *rdata = gcb->context;
111 if( rdata->init.pio_index != (udi_index_t)-1 )
113 rdata->pio_handles[rdata->init.pio_index] = new_pio_handle;
114 udi_debug_printf("PIO %i = %p\n", rdata->init.pio_index, new_pio_handle);
116 rdata->init.pio_index ++;
117 if( rdata->init.pio_index < NE2K_NUM_PIO_OPS )
119 udi_pio_map(ne2k_bus_dev_bind__pio_map, gcb,
120 UDI_PCI_BAR_0, 0, 0x20,
121 ne2k_pio_ops[rdata->init.pio_index].trans_list,
122 ne2k_pio_ops[rdata->init.pio_index].list_length,
123 UDI_PIO_LITTLE_ENDIAN, 0, 0
128 // Next: Bind interrupt
129 // - spawn_idx = Interrupt number (0)
130 udi_channel_spawn(ne2k_bus_dev_bind__intr_chanel, gcb, gcb->channel,
131 0, NE2K_OPS_IRQ, rdata);
134 void ne2k_bus_dev_bind__intr_chanel(udi_cb_t *gcb, udi_channel_t new_channel)
136 ne2k_rdata_t *rdata = gcb->context;
138 rdata->interrupt_channel = new_channel;
140 udi_cb_alloc(ne2k_bus_dev_bind__intr_attach, gcb, NE2K_CB_INTR, gcb->channel);
143 void ne2k_bus_dev_bind__intr_attach(udi_cb_t *gcb, udi_cb_t *new_cb)
145 ne2k_rdata_t *rdata = gcb->context;
149 udi_channel_event_complete( UDI_MCB(rdata->active_cb, udi_channel_event_cb_t),
150 UDI_STAT_RESOURCE_UNAVAIL );
153 udi_intr_attach_cb_t *intr_cb = UDI_MCB(new_cb, udi_intr_attach_cb_t);
154 intr_cb->interrupt_idx = 0;
155 intr_cb->min_event_pend = 2;
156 intr_cb->preprocessing_handle = rdata->pio_handles[NE2K_PIO_IRQACK];
157 udi_intr_attach_req(intr_cb);
158 // continued in ne2k_bus_dev_intr_attach_ack
160 void ne2k_bus_dev_bus_unbind_ack(udi_bus_bind_cb_t *cb)
163 void ne2k_bus_dev_intr_attach_ack(udi_intr_attach_cb_t *intr_attach_cb, udi_status_t status)
165 udi_cb_t *gcb = UDI_GCB(intr_attach_cb);
166 ne2k_rdata_t *rdata = gcb->context;
167 // continuing from ne2k_bus_dev_bind__intr_attach
168 if( status != UDI_OK ) {
170 udi_cb_free( UDI_GCB(intr_attach_cb) );
174 rdata->intr_attach_cb = intr_attach_cb;
176 rdata->init.n_intr_event_cb = 0;
177 udi_cb_alloc(ne2k_bus_dev_bind__intr_event_cb, gcb, NE2K_CB_INTR_EVENT, rdata->interrupt_channel);
180 void ne2k_bus_dev_bind__intr_event_cb(udi_cb_t *gcb, udi_cb_t *new_cb)
182 ne2k_rdata_t *rdata = gcb->context;
184 udi_intr_event_cb_t *intr_event_cb = UDI_MCB(new_cb, udi_intr_event_cb_t);
185 udi_intr_event_rdy(intr_event_cb);
186 rdata->init.n_intr_event_cb ++;
188 if( rdata->init.n_intr_event_cb < NE2K_NUM_INTR_EVENT_CBS )
190 udi_cb_alloc(ne2k_bus_dev_bind__intr_event_cb, gcb,
191 NE2K_CB_INTR_EVENT, rdata->interrupt_channel);
196 udi_pio_trans(ne2k_bus_dev_bind__card_reset, gcb,
197 rdata->pio_handles[NE2K_PIO_RESET], 0, NULL, &rdata->macaddr);
201 void ne2k_bus_dev_bind__card_reset(udi_cb_t *gcb, udi_buf_t *new_buf, udi_status_t status, udi_ubit16_t result)
203 ne2k_rdata_t *rdata = gcb->context;
205 udi_channel_event_complete( UDI_MCB(rdata->active_cb, udi_channel_event_cb_t), UDI_OK );
208 void ne2k_bus_dev_intr_detach_ack(udi_intr_detach_cb_t *intr_detach_cb)
212 void ne2k_nd_ctrl_channel_event_ind(udi_channel_event_cb_t *cb)
215 void ne2k_nd_ctrl_bind_req(udi_nic_bind_cb_t *cb, udi_index_t tx_chan_index, udi_index_t rx_chan_index)
217 udi_cb_t *gcb = UDI_GCB(cb);
218 ne2k_rdata_t *rdata = gcb->context;
219 rdata->init.rx_chan_index = rx_chan_index;
220 udi_channel_spawn(ne2k_nd_ctrl_bind__tx_chan_ok, gcb, gcb->channel, tx_chan_index, NE2K_OPS_TX, rdata);
223 void ne2k_nd_ctrl_bind__tx_chan_ok(udi_cb_t *gcb, udi_channel_t new_channel)
225 ne2k_rdata_t *rdata = gcb->context;
226 rdata->tx_channel = new_channel;
227 udi_channel_spawn(ne2k_nd_ctrl_bind__rx_chan_ok, gcb, gcb->channel,
228 rdata->init.rx_chan_index, NE2K_OPS_RX, rdata);
231 void ne2k_nd_ctrl_bind__rx_chan_ok(udi_cb_t *gcb, udi_channel_t new_channel)
233 ne2k_rdata_t *rdata = gcb->context;
234 rdata->rx_channel = new_channel;
236 udi_nic_bind_cb_t *cb = UDI_MCB(gcb, udi_nic_bind_cb_t);
237 cb->media_type = UDI_NIC_ETHER;
238 cb->min_pdu_size = 0;
239 cb->max_pdu_size = 0;
240 cb->rx_hw_threshold = 2;
241 cb->capabilities = 0;
242 cb->max_perfect_multicast = 0;
243 cb->max_total_multicast = 0;
244 cb->mac_addr_len = 6;
245 memcpy(cb->mac_addr, rdata->macaddr, 6);
246 udi_nsr_bind_ack( cb, UDI_OK );
249 void ne2k_nd_ctrl_unbind_req(udi_nic_cb_t *cb)
252 void ne2k_nd_ctrl_enable_req(udi_nic_cb_t *cb)
254 udi_cb_t *gcb = UDI_GCB(cb);
255 ne2k_rdata_t *rdata = gcb->context;
256 udi_pio_trans(ne2k_nd_ctrl_enable_req__trans_done, gcb,
257 rdata->pio_handles[NE2K_PIO_ENABLE], 0, NULL, NULL);
259 void ne2k_nd_ctrl_enable_req__trans_done(udi_cb_t *gcb, udi_buf_t *new_buf, udi_status_t status, udi_ubit16_t res)
261 udi_nsr_enable_ack( UDI_MCB(gcb, udi_nic_cb_t), status );
263 void ne2k_nd_ctrl_disable_req(udi_nic_cb_t *cb)
266 void ne2k_nd_ctrl_ctrl_req(udi_nic_ctrl_cb_t *cb)
269 void ne2k_nd_ctrl_info_req(udi_nic_info_cb_t *cb, udi_boolean_t reset_statistics)
273 void ne2k_bus_irq_channel_event_ind(udi_channel_event_cb_t *cb)
276 void ne2k_bus_irq_intr_event_ind(udi_intr_event_cb_t *cb, udi_ubit8_t flags)
278 udi_debug_printf("ne2k_bus_irq_intr_event_ind: flags=%x, intr_result=%x\n",
279 flags, cb->intr_result);
280 if( cb->intr_result & 0x01 )
282 ne2k_intr__rx_ok( UDI_GCB(cb) );
284 if( cb->intr_result & 0x40 )
286 // ne2k_intr__rdma( UDI_GCB(cb) );
289 udi_intr_event_rdy(cb);
292 // === Definition structures ===
293 udi_mgmt_ops_t ne2k_mgmt_ops = {
297 ne2k_final_cleanup_req
299 udi_ubit8_t ne2k_mgmt_op_flags[4] = {0,0,0,0};
300 udi_bus_device_ops_t ne2k_bus_dev_ops = {
301 ne2k_bus_dev_channel_event_ind,
302 ne2k_bus_dev_bus_bind_ack,
303 ne2k_bus_dev_bus_unbind_ack,
304 ne2k_bus_dev_intr_attach_ack,
305 ne2k_bus_dev_intr_detach_ack
307 udi_ubit8_t ne2k_bus_dev_ops_flags[5] = {0};
308 udi_nd_ctrl_ops_t ne2k_nd_ctrl_ops = {
309 ne2k_nd_ctrl_channel_event_ind,
310 ne2k_nd_ctrl_bind_req,
311 ne2k_nd_ctrl_unbind_req,
312 ne2k_nd_ctrl_enable_req,
313 ne2k_nd_ctrl_disable_req,
314 ne2k_nd_ctrl_ctrl_req,
315 ne2k_nd_ctrl_info_req
317 udi_ubit8_t ne2k_nd_ctrl_ops_flags[7] = {0};
318 udi_nd_tx_ops_t ne2k_nd_tx_ops = {
319 ne2k_nd_tx_channel_event_ind,
321 ne2k_nd_tx_exp_tx_req
323 udi_ubit8_t ne2k_nd_tx_ops_flags[3] = {0};
324 udi_nd_rx_ops_t ne2k_nd_rx_ops = {
325 ne2k_nd_rx_channel_event_ind,
328 udi_ubit8_t ne2k_nd_rx_ops_flags[2] = {0};
329 udi_intr_handler_ops_t ne2k_bus_irq_ops = {
330 ne2k_bus_irq_channel_event_ind,
331 ne2k_bus_irq_intr_event_ind
333 udi_ubit8_t ne2k_bus_irq_ops_flags[2] = {0};
335 udi_primary_init_t ne2k_pri_init = {
336 .mgmt_ops = &ne2k_mgmt_ops,
337 .mgmt_op_flags = ne2k_mgmt_op_flags,
338 .mgmt_scratch_requirement = 0,
339 .enumeration_attr_list_length = 4,
340 .rdata_size = sizeof(ne2k_rdata_t),
341 .child_data_size = 0,
342 .per_parent_paths = 0
344 udi_ops_init_t ne2k_ops_list[] = {
346 NE2K_OPS_DEV, NE2K_META_BUS, UDI_BUS_DEVICE_OPS_NUM,
348 (udi_ops_vector_t*)&ne2k_bus_dev_ops,
349 ne2k_bus_dev_ops_flags
352 NE2K_OPS_CTRL, NE2K_META_NIC, UDI_ND_CTRL_OPS_NUM,
354 (udi_ops_vector_t*)&ne2k_nd_ctrl_ops,
355 ne2k_nd_ctrl_ops_flags
358 NE2K_OPS_TX, NE2K_META_NIC, UDI_ND_TX_OPS_NUM,
360 (udi_ops_vector_t*)&ne2k_nd_tx_ops,
364 NE2K_OPS_RX, NE2K_META_NIC, UDI_ND_RX_OPS_NUM,
366 (udi_ops_vector_t*)&ne2k_nd_rx_ops,
370 NE2K_OPS_IRQ, NE2K_META_BUS, UDI_BUS_INTR_HANDLER_OPS_NUM,
372 (udi_ops_vector_t*)&ne2k_bus_irq_ops,
373 ne2k_bus_irq_ops_flags
377 udi_cb_init_t ne2k_cb_init_list[] = {
378 {NE2K_CB_BUS_BIND, NE2K_META_BUS, UDI_BUS_BIND_CB_NUM, 0, 0,NULL},
379 {NE2K_CB_INTR, NE2K_META_BUS, UDI_BUS_INTR_ATTACH_CB_NUM, 0, 0,NULL},
380 {NE2K_CB_INTR_EVENT, NE2K_META_BUS, UDI_BUS_INTR_EVENT_CB_NUM, 0, 0,NULL},
383 const udi_init_t udi_init_info = {
384 .primary_init_info = &ne2k_pri_init,
385 .ops_init_list = ne2k_ops_list,
386 .cb_init_list = ne2k_cb_init_list,