2 * Acess2 PCnet-FAST III Driver
3 * - By John Hodge (thePowersGang)
6 #define VERSION ((1<<8)|0)
10 #include <semaphore.h>
11 #include <IPStack/include/adapters_api.h>
15 #define VENDOR_ID 0x1022
16 #define DEVICE_ID 0x2000
17 #define TLEN_LOG2 6 // 64
19 #define TLEN (1 << TLEN_LOG2)
20 #define RLEN (1 << RLEN_LOG2)
21 #define RXBUFLEN 128 // 128*128 = 16K total RX buffer
22 #define RXBUF_PER_PAGE (PAGE_SIZE/RXBUFLEN)
23 #define NUM_RXBUF_PAGES ((RLEN*RXBUFLEN)/PAGE_SIZE)
33 void *TxQueueBuffers[TLEN]; // Pointer to the tIPStackBuffer (STP only)
40 tSemaphore ReadSemaphore;
45 void *RxBuffers[NUM_RXBUF_PAGES]; // Pages
52 int PCnet3_Install(char **Options);
53 int PCnet3_Cleanup(void);
55 tIPStackBuffer *PCnet3_WaitForPacket(void *Ptr);
56 int PCnet3_SendPacket(void *Ptr, tIPStackBuffer *Buffer);
58 int PCnet3_int_InitCard(tCard *Card);
59 void PCnet3_IRQHandler(int Num, void *Ptr);
60 void PCnet3_ReleaseRxD(void *Arg, size_t HeadLen, size_t FootLen, const void *Data);
62 static Uint16 _ReadCSR(tCard *Card, Uint8 Reg);
63 static void _WriteCSR(tCard *Card, Uint8 Reg, Uint16 Value);
64 static Uint16 _ReadBCR(tCard *Card, Uint8 Reg);
65 static void _WriteBCR(tCard *Card, Uint8 Reg, Uint16 Value);
68 MODULE_DEFINE(0, VERSION, Network_PCnetFAST3, PCnet3_Install, PCnet3_Cleanup, "IPStack", NULL);
69 tIPStack_AdapterType gPCnet3_AdapterType = {
70 .Name = "PCnet-FAST III",
71 .Type = ADAPTERTYPE_ETHERNET_100M,
72 //.Flags = ADAPTERFLAG_OFFLOAD_MAC,
74 .SendPacket = PCnet3_SendPacket,
75 .WaitForPacket = PCnet3_WaitForPacket
77 int giPCnet3_CardCount;
78 tCard *gaPCnet3_Cards;
80 tInitBlock32 gPCnet3_StaticInitBlock;
81 tInitBlock32 *gpPCnet3_InitBlock;
85 * \brief Installs the PCnet3 Driver
87 int PCnet3_Install(char **Options)
94 giPCnet3_CardCount = PCI_CountDevices(VENDOR_ID, DEVICE_ID);
95 Log_Debug("PCnet3", "%i cards", giPCnet3_CardCount);
97 if( giPCnet3_CardCount == 0 ) return MODULE_ERR_NOTNEEDED;
99 gpPCnet3_InitBlock = &gPCnet3_StaticInitBlock;
100 // TODO: Edge case bug here with the block on the end of a page
101 if( MM_GetPhysAddr(gpPCnet3_InitBlock) + sizeof(tInitBlock32) != MM_GetPhysAddr(gpPCnet3_InitBlock+1)
103 || MM_GetPhysAddr(gpPCnet3_InitBlock) > (1ULL<<32)
108 Log_Error("PCnet3", "TODO: Support 64-bit init / spanning init");
109 return MODULE_ERR_MISC;
112 gaPCnet3_Cards = calloc( giPCnet3_CardCount, sizeof(tCard) );
114 while( (id = PCI_GetDevice(VENDOR_ID, DEVICE_ID, i)) != -1 )
116 // Set up card addresses
117 // - BAR0: IO base address
118 // - BAR1: MMIO base address
119 card = &gaPCnet3_Cards[i];
120 base = PCI_GetBAR( id, 0 );
122 Log_Warning("PCnet3", "Driver does not support MMIO, skipping card");
129 card->IRQ = PCI_GetIRQ( id );
131 // Switch the card into DWord mode
132 // - TODO: Should the value of RAP matter here?
133 outd(card->IOBase + REG_RDP, 0);
137 macword = ind(card->IOBase + REG_APROM0);
138 card->MacAddr[0] = macword & 0xFF;
139 card->MacAddr[1] = macword >> 8;
140 card->MacAddr[2] = macword >> 16;
141 card->MacAddr[3] = macword >> 24;
142 macword = ind(card->IOBase + REG_APROM4);
143 card->MacAddr[4] = macword & 0xFF;
144 card->MacAddr[5] = macword >> 8;
146 // Install IRQ Handler
147 IRQ_AddHandler(card->IRQ, PCnet3_IRQHandler, card);
149 // Initialise the card state
150 PCnet3_int_InitCard(card);
153 card->IPStackHandle = IPStack_Adapter_Add(&gPCnet3_AdapterType, card, card->MacAddr);
158 if( gpPCnet3_InitBlock != &gPCnet3_StaticInitBlock ) {
159 MM_UnmapHWPages( (tVAddr)gpPCnet3_InitBlock, 1 );
162 return MODULE_ERR_OK;
165 int PCnet3_Cleanup(void)
167 // TODO: Kill IPStack adapters and clean up
171 // --- Root Functions ---
172 tIPStackBuffer *PCnet3_WaitForPacket(void *Ptr)
178 if( Semaphore_Wait( &card->ReadSemaphore, 1 ) != 1 )
180 LEAVE_RET('n', NULL);
183 // Get descriptor range for packet
184 // TODO: Replace asserts with something a little more permissive
185 Mutex_Acquire( &card->lRxPos );
186 int first_td = card->RxPos;
187 int nextp_td = first_td;
188 assert( card->RxQueue[first_td].Flags & RXDESC_FLG_STP );
189 while( !(card->RxQueue[nextp_td].Flags & RXDESC_FLG_ENP) )
191 tRxDesc_3 *rd = &card->RxQueue[nextp_td];
192 assert( !(rd->Flags & RXDESC_FLG_OWN) );
193 // TODO: Check error bits properly
194 if( rd->Flags & 0x7C000000 ) {
195 Log_Notice("PCnet3", "Error bits set: 0x%x", (rd->Flags>>24) & 0x7C);
197 nextp_td = (nextp_td+1) % RLEN;
198 assert(nextp_td != first_td);
200 nextp_td = (nextp_td+1) % RLEN;
201 card->RxPos = nextp_td;
202 Mutex_Release( &card->lRxPos );
204 int nDesc = (nextp_td - first_td + RLEN) % RLEN;
206 // Create buffer structure
207 // TODO: Could be more efficient by checking for buffers in the same page / fully contig allocations
209 tIPStackBuffer *ret = IPStack_Buffer_CreateBuffer(nDesc);
210 for( int idx = first_td; idx != nextp_td; idx = (idx+1) % RLEN )
212 tRxDesc_3 *rd = &card->RxQueue[idx];
213 void *ptr = card->RxBuffers[idx/RXBUF_PER_PAGE] + (idx%RXBUF_PER_PAGE)*RXBUFLEN;
214 IPStack_Buffer_AppendSubBuffer(ret, (rd->Count & 0xFFF), 0, ptr, PCnet3_ReleaseRxD, rd);
221 int PCnet3_int_FillTD(tTxDesc_3 *td, Uint32 BufAddr, Uint32 Len, int bBounced)
224 td->Flags1 = 0xF000 | (4096 - (Len & 0xFFF));
225 td->Buffer = BufAddr;
226 td->_avail = bBounced;
230 int PCnet3_SendPacket(void *Ptr, tIPStackBuffer *Buffer)
234 if( IPStack_Buffer_GetLength(Buffer) > 1500 ) {
239 ENTER("pPtr pBuffer", Ptr, Buffer);
240 // Need a sequence of `n` transmit descriptors
241 // - Can assume that descriptors are consumed FIFO from the current descriptor point
244 const void *sbuf_ptr;
246 while( (idx = IPStack_Buffer_GetBuffer(Buffer, idx, &sbuf_len, &sbuf_ptr)) != -1 )
250 if( MM_GetPhysAddr(sbuf_ptr) > (1ULL<<32) )
251 ; // will be bounce-buffered
254 if( MM_GetPhysAddr(sbuf_ptr)+sbuf_len-1 != MM_GetPhysAddr(sbuf_ptr+sbuf_len-1) )
261 // - Obtain enough descriptors
262 int rv = Semaphore_Wait(&card->TxDescSem, nDesc);
264 Log_Notice("PCnet3", "Semaphore wait interrupted, restoring %i descriptors");
265 Semaphore_Signal(&card->TxDescSem, rv);
266 LEAVE_RET('i', EINTR);
268 Mutex_Acquire(&card->lTxPos);
269 int first_desc = card->FirstFreeTx;
270 card->FirstFreeTx = (card->FirstFreeTx + nDesc) % TLEN;
271 Mutex_Release(&card->lTxPos);
273 // - Set up descriptors
274 int td_idx = first_desc;
275 while( (idx = IPStack_Buffer_GetBuffer(Buffer, idx, &sbuf_len, &sbuf_ptr)) != -1 )
277 tTxDesc_3 *td = &card->TxQueue[td_idx];
278 assert( !(td->Flags1 & TXDESC_FLG1_OWN) );
279 td_idx = (td_idx + 1) % TLEN;
281 tPAddr start_phys = MM_GetPhysAddr(sbuf_ptr);
282 size_t page1_maxsize = PAGE_SIZE - (start_phys % PAGE_SIZE);
283 tPAddr end_phys = MM_GetPhysAddr(sbuf_ptr + sbuf_len-1);
286 if( start_phys > (1ULL<<32) || end_phys > (1ULL<<32) )
288 // TODO: Have a global set of bounce buffers
290 void *bounce_virt = MM_AllocDMA(1, 32, &bounce_phys);
291 memcpy(bounce_virt, sbuf_ptr, sbuf_len);
292 // Copy to bounce buffer
293 PCnet3_int_FillTD(td, bounce_phys, sbuf_len, 1);
294 LOG("%i: Bounce buffer %P+%i (orig %P,%P) - %p",
295 idx, bounce_phys, sbuf_len, start_phys, end_phys, td);
299 if( start_phys+sbuf_len-1 != end_phys )
301 // Split buffer into two descriptors
302 tTxDesc_3 *td2 = &card->TxQueue[td_idx];
303 assert( !(td2->Flags1 & TXDESC_FLG1_OWN) );
304 td_idx = (td_idx + 1) % TLEN;
306 PCnet3_int_FillTD(td, start_phys, page1_maxsize, 0);
308 size_t page2_size = sbuf_len - page1_maxsize;
309 PCnet3_int_FillTD(td2, end_phys - (page2_size-1), page2_size, 0);
310 // - Explicitly set OWN on td2 because it's never the first, and `td` gets set below
311 td2->Flags1 |= TXDESC_FLG1_OWN;
313 LOG("%i: Split (%P,%P)+%i - %p,%p",
314 idx, td->Buffer, td2->Buffer, sbuf_len, td, td2);
318 PCnet3_int_FillTD(td, start_phys, sbuf_len, 0);
319 LOG("%i: Straight %P+%i - %p",
320 idx, td->Buffer, sbuf_len, td);
322 // On every descriptor except the first, set OWN
323 // - OWN set later once all are filled
324 if( td != &card->TxQueue[first_desc] )
325 td->Flags1 |= TXDESC_FLG1_OWN;
328 // - Lock buffer before allowing the card to continue
329 IPStack_Buffer_LockBuffer(Buffer);
332 card->TxQueue[first_desc].Flags1 |= TXDESC_FLG1_STP;
333 card->TxQueue[(td_idx+TLEN-1)%TLEN].Flags1 |= TXDESC_FLG1_ENP|TXDESC_FLG1_ADDFCS;
334 // - Set OWN on the first descriptor
335 card->TxQueue[first_desc].Flags1 |= TXDESC_FLG1_OWN;
336 card->TxQueueBuffers[first_desc] = Buffer;
338 LOG("CSR0=0x%x", _ReadCSR(card, 0));
339 LOG("Transmit started, waiting for completion");
341 // Block here until packet is sent
342 // TODO: Should be able to return, but just in case
343 IPStack_Buffer_LockBuffer(Buffer);
344 IPStack_Buffer_UnlockBuffer(Buffer);
350 int PCnet3_int_InitCard(tCard *Card)
352 // Allocate ring buffers
353 Card->TxQueue = (void*)MM_AllocDMA(1, 32, &Card->TxQueuePhys);
354 if( !Card->TxQueue ) {
355 return MODULE_ERR_MALLOC;
357 memset(Card->TxQueue, 0, TLEN*sizeof(*Card->TxQueue));
358 #if TLEN + RLEN <= PAGE_SIZE / (4*4)
359 Card->RxQueue = (void*)MM_AllocDMA(1, 32, &Card->RxQueuePhys);
360 if( !Card->RxQueue ) {
361 return MODULE_ERR_MALLOC;
364 Card->RxQueue = Card->TxQueue + TLEN;
365 Card->RxQueuePhys = Card->RxQueuePhys + TLEN*sizeof(*Card->TxQueue);
368 // Allocate Rx buffers
369 for( int i = 0; i < NUM_RXBUF_PAGES; i ++ )
372 Card->RxBuffers[i] = (void*)MM_AllocDMA(1, 32, &physaddr);
373 if( !Card->RxBuffers[i] ) {
374 return MODULE_ERR_MALLOC;
376 for( int j = 0; j < RXBUF_PER_PAGE; j ++ )
378 Card->RxQueue[i*RXBUF_PER_PAGE+j].Buffer = physaddr;
379 physaddr += RXBUFLEN;
383 // Initialise semaphores
384 Semaphore_Init(&Card->TxDescSem, TLEN, TLEN, "PCnet3", "Tx Descriptors");
385 Semaphore_Init(&Card->ReadSemaphore, 0, RLEN, "PCnet3", "Rx Descriptors");
387 // Fill Init Block for this card
388 gpPCnet3_InitBlock->Mode = (TLEN_LOG2 << 28) | (RLEN_LOG2 << 20);
389 gpPCnet3_InitBlock->PhysAddr1 = 0;
390 memcpy(&gpPCnet3_InitBlock->PhysAddr0, Card->MacAddr, 6);
391 gpPCnet3_InitBlock->LAdrF0 = -1; // TODO: Allow these to be set by the IPStack
392 gpPCnet3_InitBlock->LAdrF1 = -1;
393 gpPCnet3_InitBlock->RDRA = Card->RxQueuePhys;
394 gpPCnet3_InitBlock->TDRA = Card->TxQueuePhys;
397 inw(Card->IOBase + REG_RESET);
398 _WriteBCR(Card, BCR_SWSTYLE, (1<<8)|3); // Set SSIZE32
399 LOG("BCR_SWSTYLE reads as 0x%x", _ReadBCR(Card, BCR_SWSTYLE));
400 LOG("CSR4 reads as 0x%x", _ReadCSR(Card, 4));
403 tPAddr paddr = MM_GetPhysAddr(gpPCnet3_InitBlock);
404 _WriteCSR(Card, CSR_IBA0, paddr & 0xFFFF);
405 _WriteCSR(Card, CSR_IBA1, paddr >> 16);
406 _WriteCSR(Card, CSR_STATUS, CSR_STATUS_INIT|CSR_STATUS_IENA|CSR_STATUS_STRT);
411 void PCnet3_IRQHandler(int Num, void *Ptr)
414 Uint16 status = _ReadCSR(card, CSR_STATUS);
416 LOG("status = 0x%02x", status);
417 status &= ~CSR_STATUS_INTR; // Read-only bit
420 // META - Check LAPPEN bit in CSR3
421 if( status & CSR_STATUS_RINT )
423 // TODO: Avoid issues when two packets arrive in one interrupt time
424 Semaphore_Signal(&card->ReadSemaphore, 1);
428 if( status & CSR_STATUS_TINT )
431 for( idx = card->FirstUsedTxD; idx != card->FirstFreeTx; idx = (idx+1)%TLEN )
433 tTxDesc_3 *td = &card->TxQueue[idx];
434 // Stop on the first chip-owned TxD
435 LOG("idx=%i, Flags1=0x%08x", idx, td->Flags1);
436 if( td->Flags1 & TXDESC_FLG1_OWN )
438 if( td->Flags1 & (1<<30) )
440 LOG(" Flags0=0x%08x %s%s%s%s%s%s%i",
442 (td->Flags0 & (1<<31)) ? "BUFF " : "",
443 (td->Flags0 & (1<<30)) ? "UFLO " : "",
444 (td->Flags0 & (1<<29)) ? "EXDEF " : "",
445 (td->Flags0 & (1<<28)) ? "LCOL " : "",
446 (td->Flags0 & (1<<27)) ? "LCAR " : "",
447 (td->Flags0 & (1<<26)) ? "RTRY " : "",
451 if( td->Flags1 & TXDESC_FLG1_STP )
452 IPStack_Buffer_UnlockBuffer( card->TxQueueBuffers[idx] );
453 Semaphore_Signal(&card->TxDescSem, 1);
455 card->FirstUsedTxD = idx;
458 if( status & CSR_STATUS_IDON )
460 Log_Debug("PCnet3", "Card %p initialisation done", card);
461 LOG("CSR15 reads as 0x%x", _ReadCSR(card, 15));
465 if( status & 0xBC00 )
467 Log_Notice("PCnet3", "Error on %p: %s%s%s%s",
469 (status & (1<<15)) ? "ERR " : "",
470 (status & (1<<13)) ? "CERR " : "",
471 (status & (1<<12)) ? "MISS " : "",
472 (status & (1<<11)) ? "MERR " : ""
476 _WriteCSR(card, CSR_STATUS, status);
479 void PCnet3_ReleaseRxD(void *Arg, size_t HeadLen, size_t FootLen, const void *Data)
483 rd->Flags |= RXDESC_FLG_OWN;
486 static Uint16 _ReadCSR(tCard *Card, Uint8 Reg)
488 outd(Card->IOBase + REG_RAP, Reg);
489 return ind(Card->IOBase + REG_RDP);
491 static void _WriteCSR(tCard *Card, Uint8 Reg, Uint16 Value)
493 outd(Card->IOBase + REG_RAP, Reg);
494 outd(Card->IOBase + REG_RDP, Value);
496 static Uint16 _ReadBCR(tCard *Card, Uint8 Reg)
498 outd(Card->IOBase + REG_RAP, Reg);
499 return ind(Card->IOBase + REG_BDP);
501 void _WriteBCR(tCard *Card, Uint8 Reg, Uint16 Value)
503 outd(Card->IOBase + REG_RAP, Reg);
504 outd(Card->IOBase + REG_BDP, Value);