1 # File opened at 2012-09-12 11:32:08.423984
2 # aquire[DAC_Settle] = 0.0
3 # aquire[open_files] = [<open file '2012-09-12/113208.dat', mode 'w' at 0x1d31c00>]
4 # aquire[DAC_Sweep] = 4000
5 # aquire[ADC_Averages] = 200
6 # aquire[start_date] = 2012-09-12
8 # Chamber Pressure = 8.03e-08
9 # Venault Voltage = 18.49
10 # Title = Filament warm up
11 # Comment = Heating current increased to 1.15A over 1min
12 # Accelerating Voltage = 132.2
13 # Focus Voltage = -3.02
14 # Deflection Voltage = 4.24
15 # Initial Voltage = max
16 # Heating Current = 1.15
17 # Heating Voltage (across filament) = Not known yet
18 # Heating Voltage (across power supply) = Unknown
20 # 602 Scale = 1e-6 x 0.1
21 # 602 0.1 Battery = 7.78
22 # 602 0.03 Battery = 7.78
23 # 602 0.01 Battery = 7.88
24 # 602 0.003 Battery = 7.88
25 # 602 0.001 Battery = 8.20
26 # ADC Regulator = 3.32
27 # Sample = Au on Si (125min 3.5A 3-6e-8mbar)
29 # Data = time DAC ADC5 ADC5_sigma
30 # Parameters last checked = 2012-09-12 11:32:08.418109
32 # Experiment 2012-09-12 11:32:08.955572
37 2.57111358643 4000 0.0 0.0
38 2.77167797089 4000 0.0 0.0
39 2.97172451019 4000 0.0 0.0
40 3.17412495613 4000 0.0 0.0
41 3.37771606445 4000 0.0 0.0
42 3.57926464081 4000 0.0 0.0
43 3.77928304672 4000 0.0 0.0
44 3.98179388046 4000 0.0 0.0
45 4.18575406075 4000 0.0 0.0
46 4.38980960846 4000 0.0 0.0
47 4.59505295753 4000 0.0 0.0
48 4.79586839676 4000 0.0 0.0
49 4.99773406982 4000 0.0 0.0
50 5.19923400879 4000 0.0 0.0
51 5.399477005 4000 0.0 0.0
52 5.59998512268 4000 0.0 0.0
53 5.80201554298 4000 0.0 0.0
54 6.00542736053 4000 0.0 0.0
55 6.20946002007 4000 0.0 0.0
56 6.41149616241 4000 0.0 0.0
57 6.65473651886 4000 0.0 0.0
58 6.85801196098 4000 0.0 0.0
59 7.06202793121 4000 0.0 0.0
60 7.26556062698 4000 0.0 0.0
61 7.46758985519 4000 0.0 0.0
62 7.66961193085 4000 0.0 0.0
63 7.87410163879 4000 0.0 0.0
64 8.11546945572 4000 0.0 0.0
65 8.31768035889 4000 0.0 0.0
66 8.52229070663 4000 0.0 0.0
67 8.72621917725 4000 0.0 0.0
68 8.93021726608 4000 0.0 0.0
69 9.13406133652 4000 0.0 0.0
70 9.34265232086 4000 0.0 0.0
71 9.54630255699 4000 0.0 0.0
72 9.75031495094 4000 0.0 0.0
73 9.95388555527 4000 0.0 0.0
74 10.1558613777 4000 0.0 0.0
75 10.3578875065 4000 0.0 0.0
76 10.5619001389 4000 0.0 0.0
77 10.7658984661 4000 0.0 0.0
78 10.9684770107 4000 0.0 0.0
79 11.1705219746 4000 0.0 0.0
80 11.3739855289 4000 0.0 0.0
81 11.5779995918 4000 0.0 0.0
82 # Recieved KILL signal.
83 # Reason: Change plot from ADC vs DAC to ADC vs Time
84 # File closed at 2012-09-12 11:32:31.326227