1 -------------------------------------------------------------------------------
3 -- Project: <Floating Point Unit Core>
5 -- Description: FPU package wich contains constants and functions needed in the FPU core
6 -------------------------------------------------------------------------------
8 -- 100101011010011100100
9 -- 110000111011100100000
10 -- 100000111011000101101
11 -- 100010111100101111001
12 -- 110000111011101101001
13 -- 010000001011101001010
14 -- 110100111001001100001
15 -- 110111010000001100111
16 -- 110110111110001011101
17 -- 101110110010111101000
18 -- 100000010111000000000
20 -- Author: Jidan Al-eryani
25 -- This source file may be used and distributed without
26 -- restriction provided that this copyright statement is not
27 -- removed from the file and that any derivative work contains
28 -- the original copyright notice and the associated disclaimer.
30 -- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
31 -- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 -- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 -- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR
34 -- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 -- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
37 -- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
38 -- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
39 -- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 -- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
41 -- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 -- POSSIBILITY OF SUCH DAMAGE.
46 use ieee.std_logic_1164.all;
47 use ieee.std_logic_unsigned.all;
52 -- Data width of floating-point number. Deafult: 32
53 constant FP_WIDTH : integer := 32;
55 -- Data width of fraction. Deafult: 23
56 constant FRAC_WIDTH : integer := 23;
58 -- Data width of exponent. Deafult: 8
59 constant EXP_WIDTH : integer := 8;
62 constant ZERO_VECTOR: std_logic_vector(30 downto 0) := "0000000000000000000000000000000";
65 constant INF : std_logic_vector(30 downto 0) := "1111111100000000000000000000000";
67 -- QNaN (Quit Not a Number) FP format (without sign bit)
68 constant QNAN : std_logic_vector(30 downto 0) := "1111111110000000000000000000000";
70 -- SNaN (Signaling Not a Number) FP format (without sign bit)
71 constant SNAN : std_logic_vector(30 downto 0) := "1111111100000000000000000000001";
73 -- count the zeros starting from left
74 function count_l_zeros (signal s_vector: std_logic_vector) return std_logic_vector;
76 -- count the zeros starting from right
77 function count_r_zeros (signal s_vector: std_logic_vector) return std_logic_vector;
81 package body fpupack is
83 -- count the zeros starting from left
84 function count_l_zeros (signal s_vector: std_logic_vector) return std_logic_vector is
85 variable v_count : std_logic_vector(5 downto 0);
88 for i in s_vector'range loop
90 when '0' => v_count := v_count + "000001";
98 -- count the zeros starting from right
99 function count_r_zeros (signal s_vector: std_logic_vector) return std_logic_vector is
100 variable v_count : std_logic_vector(5 downto 0);
103 for i in 0 to s_vector'length-1 loop
105 when '0' => v_count := v_count + "000001";