1 -------------------------------------------------------------------------------
3 -- Project: <Floating Point Unit Core>
5 -- Description: pre-normalization entity for the square-root unit
6 -------------------------------------------------------------------------------
8 -- 100101011010011100100
9 -- 110000111011100100000
10 -- 100000111011000101101
11 -- 100010111100101111001
12 -- 110000111011101101001
13 -- 010000001011101001010
14 -- 110100111001001100001
15 -- 110111010000001100111
16 -- 110110111110001011101
17 -- 101110110010111101000
18 -- 100000010111000000000
20 -- Author: Jidan Al-eryani
25 -- This source file may be used and distributed without
26 -- restriction provided that this copyright statement is not
27 -- removed from the file and that any derivative work contains
28 -- the original copyright notice and the associated disclaimer.
30 -- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
31 -- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 -- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 -- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR
34 -- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 -- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
37 -- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
38 -- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
39 -- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 -- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
41 -- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 -- POSSIBILITY OF SUCH DAMAGE.
46 use ieee.std_logic_1164.all;
47 use ieee.std_logic_unsigned.all;
48 use ieee.std_logic_misc.all;
53 entity pre_norm_sqrt is
56 opa_i : in std_logic_vector(FP_WIDTH-1 downto 0);
57 fracta_52_o : out std_logic_vector(2*(FRAC_WIDTH+3)-1 downto 0);
58 exp_o : out std_logic_vector(EXP_WIDTH-1 downto 0)
62 architecture rtl of pre_norm_sqrt is
64 signal s_expa : std_logic_vector(EXP_WIDTH-1 downto 0);
65 signal s_exp_o, s_exp_tem : std_logic_vector(EXP_WIDTH downto 0);
66 signal s_fracta : std_logic_vector(FRAC_WIDTH-1 downto 0);
67 signal s_fracta_24 : std_logic_vector(FRAC_WIDTH downto 0);
68 signal s_fracta_52_o, s_fracta1_52_o, s_fracta2_52_o : std_logic_vector(2*(FRAC_WIDTH+3)-1 downto 0);
69 signal s_sqr_zeros_o : std_logic_vector(5 downto 0);
72 signal s_opa_dn : std_logic;
76 s_expa <= opa_i(30 downto 23);
77 s_fracta <= opa_i(22 downto 0);
80 exp_o <= s_exp_o(7 downto 0);
81 fracta_52_o <= s_fracta_52_o;
83 -- opa or opb is denormalized
84 s_opa_dn <= not or_reduce(s_expa);
86 s_fracta_24 <= (not s_opa_dn) & s_fracta;
88 -- count leading zeros
89 s_sqr_zeros_o <= count_l_zeros(s_fracta_24 );
91 -- adjust the exponent
92 s_exp_tem <= ("0"&s_expa)+"001111111" - ("000"&s_sqr_zeros_o);
96 if rising_edge(clk_i) then
97 if or_reduce(opa_i(30 downto 0))='1' then
98 s_exp_o <= ("0"&s_exp_tem(8 downto 1));
100 s_exp_o <= "000000000";
105 -- left-shift the radicand
106 s_fracta1_52_o <= shl(s_fracta_24, s_sqr_zeros_o) & "0000000000000000000000000000";
107 s_fracta2_52_o <= '0' & shl(s_fracta_24, s_sqr_zeros_o) & "000000000000000000000000000";
109 s_fracta_52_o <= s_fracta1_52_o when s_expa(0)='0' else s_fracta2_52_o;