Uint64 PCI_ReadDevice(tVFS_Node *node, Uint64 pos, Uint64 length, void *buffer);\r
Uint64 PCI_ReadDevice(tVFS_Node *node, Uint64 pos, Uint64 length, void *buffer);\r
int PCI_CountDevices(Uint16 vendor, Uint16 device, Uint16 fcn);\r
int PCI_GetDevice(Uint16 vendor, Uint16 device, Uint16 fcn, int idx);\r
int PCI_GetDeviceByClass(Uint16 class, Uint16 mask, int prev);\r
Uint8 PCI_GetIRQ(int id);\r
Uint32 PCI_GetBAR0(int id);\r
Uint32 PCI_GetBAR1(int id);\r
int PCI_CountDevices(Uint16 vendor, Uint16 device, Uint16 fcn);\r
int PCI_GetDevice(Uint16 vendor, Uint16 device, Uint16 fcn, int idx);\r
int PCI_GetDeviceByClass(Uint16 class, Uint16 mask, int prev);\r
Uint8 PCI_GetIRQ(int id);\r
Uint32 PCI_GetBAR0(int id);\r
Uint32 PCI_GetBAR1(int id);\r
Uint32 PCI_GetBAR3(int id);\r
Uint32 PCI_GetBAR4(int id);\r
Uint32 PCI_GetBAR5(int id);\r
Uint16 PCI_AssignPort(int id, int bar, int count);\r
Uint32 PCI_GetBAR3(int id);\r
Uint32 PCI_GetBAR4(int id);\r
Uint32 PCI_GetBAR5(int id);\r
Uint16 PCI_AssignPort(int id, int bar, int count);\r
\r
int PCI_EnumDevice(Uint16 bus, Uint16 dev, Uint16 fcn, tPCIDevice *info);\r
Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset);\r
\r
int PCI_EnumDevice(Uint16 bus, Uint16 dev, Uint16 fcn, tPCIDevice *info);\r
Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset);\r
for( i = 0; i < MAX_RESERVED_PORT % 32; i ++ )\r
gaPCI_PortBitmap[MAX_RESERVED_PORT / 32] = 1 << i;\r
\r
for( i = 0; i < MAX_RESERVED_PORT % 32; i ++ )\r
gaPCI_PortBitmap[MAX_RESERVED_PORT / 32] = 1 << i;\r
\r
- // Ensure the buffer is nice and tight\r
- tmpPtr = realloc(gPCI_Devices, giPCI_DeviceCount*sizeof(tPCIDevice));\r
- if(tmpPtr == NULL)\r
+ // Allocate device buffer\r
+ tmpPtr = malloc(giPCI_DeviceCount * sizeof(tPCIDevice));\r
+ if(tmpPtr == NULL) {\r
+ Log_Warning("PCI", "Malloc ERROR");\r
+ Log_Log("PCI", "%i devices, filling structure", giPCI_DeviceCount);\r
+ \r
+ // Reset counts\r
+ giPCI_DeviceCount = 0;\r
+ giPCI_BusCount = 0;\r
+ memset(gaPCI_BusBitmap, 0, sizeof(gaPCI_BusBitmap));\r
+ // Rescan, filling the PCI device array\r
+ PCI_ScanBus(0, 1);\r
+ \r
if(!PCI_EnumDevice(BusID, dev, fcn, &devInfo))\r
continue;\r
\r
if(!PCI_EnumDevice(BusID, dev, fcn, &devInfo))\r
continue;\r
\r
BusID, dev, fcn, devInfo.vendor, devInfo.device);\r
#endif\r
//TODO: Handle PCI-PCI Bridges\r
BusID, dev, fcn, devInfo.vendor, devInfo.device);\r
#endif\r
//TODO: Handle PCI-PCI Bridges\r
- devInfo.Node.Inode = giPCI_DeviceCount;\r
- memcpy(&gPCI_Devices[giPCI_DeviceCount], &devInfo, sizeof(tPCIDevice));\r
+ if( bFill ) {\r
+ devInfo.Node.Inode = giPCI_DeviceCount;\r
+ memcpy(&gPCI_Devices[giPCI_DeviceCount], &devInfo, sizeof(tPCIDevice));\r
+ }\r
giPCI_DeviceCount ++;\r
\r
// WTF is this for?\r
// Maybe bit 23 must be set for the device to be valid?\r
// - Actually, maybe 23 means that there are sub-functions\r
if(fcn == 0) {\r
giPCI_DeviceCount ++;\r
\r
// WTF is this for?\r
// Maybe bit 23 must be set for the device to be valid?\r
// - Actually, maybe 23 means that there are sub-functions\r
if(fcn == 0) {\r
\r
vendor = PCI_CfgReadWord(bus, slot, fcn, 0x0|0);\r
if(vendor == 0xFFFF) // Invalid Device\r
\r
vendor = PCI_CfgReadWord(bus, slot, fcn, 0x0|0);\r
if(vendor == 0xFFFF) // Invalid Device\r
info->oc = PCI_CfgReadWord(bus, slot, fcn, 0x8|2);\r
\r
// Load Config Bytes\r
info->oc = PCI_CfgReadWord(bus, slot, fcn, 0x8|2);\r
\r
// Load Config Bytes\r
info->ConfigCache[i] = PCI_CfgReadDWord(bus, slot, fcn, i*4);\r
info->ConfigCache[i] = PCI_CfgReadDWord(bus, slot, fcn, i*4);\r
offset &= 0xFF; // 8 Bits\r
\r
address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC);\r
offset &= 0xFF; // 8 Bits\r
\r
address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC);\r
return data;\r
}\r
void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data)\r
return data;\r
}\r
void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data)\r
}\r
Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
}\r
Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
- Uint32 data;\r
- \r
- bus &= 0xFF; // 8 Bits\r
- dev &= 0x1F; // 5 Bits\r
- func &= 0x7; // 3 Bits\r
- offset &= 0xFF; // 8 Bits\r
+ Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset);\r
- //LogF("PCI_CfgReadWord: (bus=0x%x,dev=0x%x,func=%x,offset=0x%x)\n", bus, dev, func, offset);\r
+ data >>= (offset&2)*8; // Allow Access to Upper Word\r
return (Uint16)data;\r
}\r
\r
Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
return (Uint16)data;\r
}\r
\r
Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
- Uint32 address;\r
- Uint32 data;\r
- \r
- bus &= 0xFF; // 8 Bits\r
- dev &= 0x1F; // 4 Bits\r
- func &= 0x7; // 3 Bits\r
- offset &= 0xFF; // 8 Bits\r
- \r
- address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC);\r
- outd(0xCF8, address);\r
+ Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset);\r