- Uint16 _padding[(0x100-0x2C)/2];
-
- struct s_port
- {
- Uint32 PxCLB; // Command List Base Address
- Uint32 PxCLBU; // (High of above)
- Uint32 PxFB; // FIS Base Address
- Uint32 PxFBU; // (high of above)
- Uint32 PxIS; // Interrupt Status
- Uint32 PxIE; // Interrupt Enable
- Uint32 PxCMD; // Command and Status
- Uint32 _resvd;
- Uint32 PxTFD; // Task File Data
- Uint32 PxSIG; // Signature
- Uint32 PxSSTS; // Serial ATA Status
- Uint32 PxSCTL; // Serial ATA Control
- Uint32 PxSERR; // Serial ATA Error
- Uint32 PxSACT; // Serial ATA Active
- Uint32 PxCI; // Command Issue
- Uint32 PxSNTF; // Serial ATA Notification
- Uint32 PxFBS; // FIS-based Switching Control
- Uint32 _resvd2[(0x70-0x44)/4];
- Uint32 PxVS[4];
- } Ports[32];
+ int PortCount;
+ tAHCI_Port *Ports;
+};
+
+struct sAHCI_Port
+{
+ int Idx; // Hardware index
+ tAHCI_Ctrlr *Ctrlr;
+ volatile struct s_port *MMIO;
+
+ tMutex lCommandSlots;
+ Uint32 IssuedCommands;
+ volatile struct sAHCI_CmdHdr *CmdList;
+ struct sAHCI_CmdTable *CommandTables[32];
+ tThread *CommandThreads[32];
+ volatile struct sAHCI_RcvdFIS *RcvdFIS;
+
+ tSemaphore InterruptSem;
+ Uint32 LastIS;
+
+ bool bHotplug;
+ bool bPresent;
+ bool bATAPI;
+
+ void *LVMHandle;
+ Uint64 SectorCount;