+
+ /*
+ * \note Area for software use
+ * \brief Last TD in this list, used to add things to the end
+ */
+ tUHCI_TD *_LastItem;
+} __attribute__((aligned(16)));
+
+struct sUHCI_Controller
+{
+ /**
+ * \brief PCI Device ID
+ */
+ Uint16 PciId;
+
+ /**
+ * \brief IO Base Address
+ */
+ Uint16 IOBase;
+
+ /**
+ * \brief Memory Mapped-IO base address
+ */
+ Uint16 *MemIOMap;
+
+ /**
+ * \brief IRQ Number assigned to the device
+ */
+ int IRQNum;
+
+ /**
+ * \brief Number of the last frame to be cleaned
+ */
+ int LastCleanedFrame;
+
+ /**
+ * \brief Frame list
+ *
+ * 31:4 - Frame Pointer
+ * 3:2 - Reserved
+ * 1 - QH/TD Selector
+ * 0 - Terminate (Empty Pointer)
+ */
+ Uint32 *FrameList;
+
+ /**
+ * \brief Physical Address of the Frame List
+ */
+ tPAddr PhysFrameList;
+
+ tUSBHub *RootHub;
+
+ /**
+ * \brief Load in bytes on each interrupt queue
+ */
+ int InterruptLoad[128];
+
+ tPAddr PhysTDQHPage;
+ struct
+ {
+ // 127 Interrupt Queue Heads
+ // - 4ms -> 256ms range of periods
+ tUHCI_QH InterruptQHs[0];
+ tUHCI_QH InterruptQHs_256ms[64];
+ tUHCI_QH InterruptQHs_128ms[32];
+ tUHCI_QH InterruptQHs_64ms [16];
+ tUHCI_QH InterruptQHs_32ms [ 8];
+ tUHCI_QH InterruptQHs_16ms [ 4];
+ tUHCI_QH InterruptQHs_8ms [ 2];
+ tUHCI_QH InterruptQHs_4ms [ 1];
+ tUHCI_QH _padding;
+
+ tUHCI_QH ControlQH;
+ tUHCI_QH BulkQH;
+
+ tUHCI_TD LocalTDPool[ (4096-(128+2)*sizeof(tUHCI_QH)) / sizeof(tUHCI_TD) ];
+ } *TDQHPage;
+
+ struct {
+ tUHCI_EndpointInfo EndpointInfo[16];
+ } *DevInfo[256];