-KERNEL_BASE = 0x80000000
-PCI_PADDR = 0x60000000 @ Realview
-UART0_PADDR = 0x10009000 @ Realview
+
+#include "include/assembly.h"
+#include "include/options.h"
+
@
@ Exception defs taken from ARM DDI 0406B
@
.section .init
interrupt_vector_table:
- b _start @ Reset
- b . @ #UD
- b SyscallHandler @ SVC (SWI assume)
- b . @ Prefetch abort
- b . @ Data abort
- b . @ Not Used
- b IRQHandler @ IRQ
- b . @ FIQ (Fast interrupt)
+ivt_reset: b _start @ Reset
+ivt_undef: b . @ #UD
+ivt_svc: b SVC_Handler @ SVC (used to be called SWI)
+ivt_prefetch: b PrefetchAbort @ Prefetch abort
+ivt_data: b DataAbort @ Data abort
+ivt_unused: b . @ Not Used
+ivt_irq: b IRQHandler @ IRQ
+ivt_fiq: b . @ FIQ (Fast interrupt)
.globl _start
_start:
mov r0, #3
mcr p15, 0, r0, c3, c0, 0 @ Set Domain 0 to Manager
+ @ Enable VMSA
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1
orr r0, r0, #1 << 23
mcr p15, 0, r0, c1, c0, 0
- ldr sp, =stack+0x10000 @ Set up stack
+ @
+ @ Check for security extensions
+ @
+ mrc p15, 0, r0, c0, c1, 1
+ and r0, #0xF0
+ @ - Present
+ ldrne r0,=KERNEL_BASE
+ mcrne p15, 0, r0, c12, c0, 0 @ Set the VBAR (brings exceptions into high memory)
+ @ - Absent
+ mrceq p15, 0, r0, c1, c0, 0 @ Set SCTLR.V
+ orreq r0, #0x2000
+ mcreq p15, 0, r0, c1, c0, 0
+
+
+ @ Prepare for interrupts
+ cps #18 @ IRQ Mode
+ ldr sp, =irqstack+0x1000 @ Set up stack
+ cps #23 @ Abort Mode
+ ldr sp, =abortstack+0x1000
+ cps #19
+
+ ldr sp, =0x80000000-4 @ Set up stack (top of user range)
ldr r0, =kmain
mov pc, r0
1: b 1b @ Infinite loop
_ptr_kmain:
.long kmain
-.comm stack, 0x10000 @ ; 64KiB Stack
+.comm irqstack, 0x1000 @ ; 4KiB Stack
+.comm abortstack, 0x1000 @ ; 4KiB Stack
-SyscallHandler:
- b .
+.extern SyscallHandler
+SVC_Handler:
+@ sub lr, #4
+ srsdb sp!, #19 @ Save state to stack
+ cpsie ifa, #19 @ Ensure we're in supervisor with interrupts enabled (should already be there)
+ push {r0-r12}
+
+ ldr r4, [lr,#-4]
+ mvn r5, #0xFF000000
+ and r4, r5
+
+ tst r4, #0x1000
+ bne .arm_specifics
+
+ push {r4}
+ mov r0, sp
+ ldr r4, =SyscallHandler
+ blx r4
+
+ pop {r2} @ errno
+ pop {r0,r1} @ Ret/RetHi
+ add sp, #2*4 @ Saved r2/r3
+
+ pop {r4-r12}
+ rfeia sp! @ Pop state (actually RFEFD)
+.arm_specifics:
+ and r4, #0xFF
+
+@
+@ Cache invalidation
+ cmp r4, #0x001
+ bne 1f
+ @ Page align
+ mov r2, #0x1000
+ sub r2, #1
+ add r1, r2
+ mvn r2, r2
+ and r0, r2
+ and r1, r2
+ cmp r0, #0x78000000
+ cmpls r1, #0x78000000
+ movge r0, #-1
+ movge r1, #0
+ movge r2, #1
+ bge .ret
+
+2:
+ cmp r0, r1
+ mcrlt p15, 0, r0, c7, c5, 1
+ mcrlt p15, 0, r0, c7, c6, 1
+ addlt r0, #0x1000
+ blt 2b
+ mov r0, #0
+ mov r1, #0
+ mov r2, #0
+ b .ret
+1:
+ mov r0, #-1
+ mov r1, #0
+ mov r2, #-1
+.ret:
+ add sp, #4*4
+ pop {r4-r12}
+ rfeia sp!
+
+
+.globl gpIRQHandler
+gpIRQHandler: .long 0
+IRQ_saved_sp: .long 0
+IRQ_saved_lr: .long 0
+.globl IRQHandler
IRQHandler:
+ sub lr, #4 @ Adjust LR to the correct value
+ srsdb sp!, #19 @ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+ cps #19
+
+ PUSH_GPRS
+
+@ ldr r0, =csIRQ_Tag
+@ ldr r1, =csIRQ_Fmt
+@ ldr r4, =Log_Debug
+@ blx r4
+
+ @ Call the registered handler
+ ldr r0, gpIRQHandler
+ blx r0
+
+ @ Restore CPU state
+ POP_GPRS
+ cpsie i
+ rfeia sp! @ Pop state (actually RFEFD)
+ bx lr
+
+.globl DataAbort
+DataAbort:
+ sub lr, #8 @ Adjust LR to the correct value
+@ srsdb sp!, #19 @ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+@ cpsid ifa, #19
+@ PUSH_GPRS
+
+ mrc p15, 0, r4, c5, c0, 0 @ Read DFSR (Data Fault Address Register) to stack
+ push {r4}
+ mrc p15, 0, r3, c6, c0, 0 @ Read DFAR (Data Fault Address Register) into R3
+ mov r2, lr
+ ldr r1, =csDataAbort_Fmt
+ ldr r0, =csAbort_Tag
+ ldr r4, =Log_Error
+ blx r4
b .
+@ POP_GPRS
+@ rfeia sp! @ Pop state (actually RFEFD)
+
+.globl PrefetchAbort
+PrefetchAbort:
+ sub lr, #4 @ Adjust LR to the correct value
+@ srsdb sp!, #19 @ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+@ cpsid ifa, #19
+@ PUSH_GPRS
+
+ ldr r0, =csAbort_Tag
+ ldr r1, =csPrefetchAbort_Fmt
+ mov r2, lr
+ mrc p15, 0, r3, c5, c0, 0 @ Read IFSR (Instruction Fault Address Register) into R3
+ ldr r4, =Log_Error
+ blx r4
+ b .
+
+csIRQ_Tag:
+csAbort_Tag:
+ .asciz "ARMv7"
+csIRQ_Fmt:
+ .asciz "IRQ"
+csDataAbort_Fmt:
+ .asciz "Data Abort - %p accessed %p, DFSR=%x Unk:%x Unk:%x"
+csPrefetchAbort_Fmt:
+ .asciz "Prefetch Abort at %p, IFSR=%x"
+
.section .padata
.globl kernel_table0
.rept 0x7FC - 1
.long 0
.endr
- .long user_table1_map + 0x000 - KERNEL_BASE + 1
- .long user_table1_map + 0x400 - KERNEL_BASE + 1
- .long 0 @ user_table1_map + 0x800 - KERNEL_BASE + 1
- .long 0 @ user_table1_map + 0xC00 - KERNEL_BASE + 1
+ .long user_table1_map + 0x000 - KERNEL_BASE + 1 @ 0x7FC00000
+ .long user_table1_map + 0x400 - KERNEL_BASE + 1 @ 0x7FD00000
+ .long user_table1_map + 0x800 - KERNEL_BASE + 1 @ KStacks
+ .long user_table1_map + 0xC00 - KERNEL_BASE + 1
@ 0x80000000 - User/Kernel split
.long 0x00000002 @ Map first 4 MiB to 2GiB
.long 0x00100002 @
.long kernel_table1_map + 0x400 - KERNEL_BASE + 1
.long kernel_table1_map + 0x800 - KERNEL_BASE + 1
.long kernel_table1_map + 0xC00 - KERNEL_BASE + 1
- @ Top level fractals
- .long 0 @ removed for alignment constraints, using the KERNEL_BASE identity mapping instead
- .rept 0x1000 - 0xFF8 - 5
- .long 0
- .endr
+ .long kernel_exception_map + 0x000 - KERNEL_BASE + 1
+ .long kernel_exception_map + 0x400 - KERNEL_BASE + 1
+ .long kernel_exception_map + 0x800 - KERNEL_BASE + 1
+ .long kernel_exception_map + 0xC00 - KERNEL_BASE + 1
@ PID0 user table
.globl user_table1_map
-user_table1_map: @ Size = 4KiB
- .rept 0x7F8/4
+@ User table1 data table (only the first half is needed)
+@ - Abused to provide kernel stacks in upper half
+user_table1_map: @ Size = 4KiB (only 2KiB used)
+ .rept 0x800/4-1
.long 0
.endr
- .long kernel_table0 - KERNEL_BASE + (1 << 4) + 3
- .long user_table1_map - KERNEL_BASE + (1 << 4) + 3
- .rept 0x800/4
+ .long user_table1_map - KERNEL_BASE + 0x10 + 3 @ ...1FF000 = 0x7FDFF000
+ @ Kernel stack zone
+ .long kernel_table0 + 0x0000 - KERNEL_BASE + 0x10 + 3 @ ...200000 = 0x7FE00000
+ .long kernel_table0 + 0x1000 - KERNEL_BASE + 0x10 + 3 @ ...201000 = 0x7FE01000
+ .rept (0x800/4)-(MM_KSTACK_SIZE/0x1000)-2
.long 0
.endr
+ #if MM_KSTACK_SIZE != 0x2000
+ #error Kernel stack size not changed in start.S
+ #endif
+ .long stack + 0x0000 - KERNEL_BASE + 0x10 + 3 @ Kernel Stack
+ .long stack + 0x1000 - KERNEL_BASE + 0x10 + 3 @
.globl kernel_table1_map
kernel_table1_map: @ Size = 4KiB
- .rept 0xF00/4
+ .rept (0xF00+16)/4
.long 0
.endr
.long hwmap_table_0 - KERNEL_BASE + (1 << 4) + 3
- .rept 0xFF8/4 - 0xF00/4 - 1
+ .rept 0xFF8/4 - (0xF00+16)/4 - 1
.long 0
.endr
.long kernel_table1_map - KERNEL_BASE + (1 << 4) + 3
- .long 0
+ .long kernel_exception_map - KERNEL_BASE + 0x13
@ Hardware mappings
.globl hwmap_table_0
.rept 1024 - 1
.long 0
.endr
+.globl kernel_exception_map
+kernel_exception_map:
+ @ Padding
+ .rept 1024-256
+ .long 0
+ .endr
+ @ Align to nearly the end
+ .rept 256-16
+ .long 0
+ .endr
+ .long 0x213 @ Map first page for exceptions (Kernel RO)
+ .rept 15
+ .long 0
+ .endr
+.section .padata
+stack:
+ .space MM_KSTACK_SIZE, 0 @ Original kernel stack
+
git.ucc.asn.au / tpg / acess2.git / blobdiff
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