@
.section .init
interrupt_vector_table:
-ivt_reset: b _start @ Reset
-ivt_undef: b . @ #UD
-ivt_svc: b SyscallHandler @ SVC (SWI assume)
-ivt_prefetch: b PrefetchAbort @ Prefetch abort
-ivt_data: b DataAbort @ Data abort
-ivt_unused: b . @ Not Used
-ivt_irq: b IRQHandler @ IRQ
-ivt_fiq: b . @ FIQ (Fast interrupt)
+ivt_reset: b _start @ 0x00 Reset
+ivt_undef: b . @ 0x04 #UD
+ivt_svc: b SVC_Handler @ 0x08 SVC (used to be called SWI)
+ivt_prefetch: b PrefetchAbort @ 0x0C Prefetch abort
+ivt_data: b DataAbort @ 0x10 Data abort
+ivt_unused: b . @ 0x14 Not Used
+ivt_irq: b IRQHandler @ 0x18 IRQ
+ivt_fiq: b . @ 0x1C FIQ (Fast interrupt)
.globl _start
_start:
.comm irqstack, 0x1000 @ ; 4KiB Stack
.comm abortstack, 0x1000 @ ; 4KiB Stack
-SyscallHandler:
- b .
+.extern SyscallHandler
+SVC_Handler:
+@ sub lr, #4
+ srsdb sp!, #19 @ Save state to stack
+ cpsie ifa, #19 @ Ensure we're in supervisor with interrupts enabled (should already be there)
+ push {r0-r12}
+
+ ldr r4, [lr,#-4]
+ mvn r5, #0xFF000000
+ and r4, r5
+
+ tst r4, #0x1000
+ bne .arm_specifics
+
+ push {r4}
+
+ mov r0, sp
+ ldr r4, =SyscallHandler
+ blx r4
+
+ pop {r2} @ errno
+ pop {r0,r1} @ Ret/RetHi
+ add sp, #2*4 @ Saved r2/r3
+
+ pop {r4-r12}
+ rfeia sp! @ Pop state (actually RFEFD)
+.arm_specifics:
+ and r4, #0xFF
+ mov r0, r4 @ Number
+ mov r1, sp @ Arguments
+
+ ldr r4, =ARMv7_int_HandleSyscalls
+ blx r4
+
+ add sp, #4*4
+ pop {r4-r12}
+ rfeia sp!
+
.globl gpIRQHandler
gpIRQHandler: .long 0
PUSH_GPRS
-@ ldr r0, =csIRQ_Tag
-@ ldr r1, =csIRQ_Fmt
-@ ldr r4, =Log_Debug
-@ blx r4
+ ldr r0, =csIRQ_Tag
+ ldr r1, =csIRQ_Fmt
+ ldr r4, =Log_Debug
+ blx r4
@ Call the registered handler
ldr r0, gpIRQHandler
@ POP_GPRS
@ rfeia sp! @ Pop state (actually RFEFD)
- bx lr
.globl PrefetchAbort
PrefetchAbort:
blx r4
b .
+.section .rodata
csIRQ_Tag:
csAbort_Tag:
.asciz "ARMv7"