// - Memory Layout
#define MM_USER_MIN 0x00200000
#define USER_STACK_SZ 0x00010000
-#define USER_STACK_TOP 0x00200000
+#define USER_STACK_TOP 0x00800000
#define MM_USER_MAX 0xBC000000
#define MM_PPD_MIN 0xBC000000 // Per-Process Data
#define MM_PPD_VFS 0xBC000000 //
# error "Unknown architecture '" #ARCH "'"
#endif
+#if USE_MP
+# define MAX_CPUS 8
+#else
+# define MAX_CPUS 1
+#endif
+
// === MACROS ===
#define LOCK(lockptr) do {int v=1;\
while(v)__asm__ __volatile__("lock xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));}while(0)
#define RELEASE(lockptr) __asm__ __volatile__("lock andl $0, (%%edi)"::"D"(lockptr));
+#define HALT() __asm__ __volatile__ ("hlt")
// === TYPES ===
typedef unsigned int Uint; // Unsigned machine native integer
Uint8 BaseHi;
} __attribute__ ((packed)) tGDT;
+typedef struct {
+ #if USE_PAE
+ Uint PDPT[4];
+ #else
+ Uint CR3;
+ #endif
+} tMemoryState;
+
+typedef struct {
+ Uint EIP, ESP, EBP;
+} tTaskState;
+
// --- Interface Flags & Macros
#define CLONE_VM 0x10