Fixing MultiCPU thread distribution (only tested in single-cpu)

[tpg/acess2.git] / Kernel / arch / x86 / include / arch.h

diff --git a/Kernel/arch/x86/include/arch.h b/Kernel/arch/x86/include/arch.h
index 0afc51d..7735568 100644 (file)
--- a/Kernel/arch/x86/include/arch.h
+++ b/Kernel/arch/x86/include/arch.h
@@ -6,35 +6,12 @@
 #ifndef _ARCH_H_
 #define _ARCH_H_
 
-// - Memory Layout
-#define        MM_USER_MIN     0x00200000
-#define        USER_STACK_SZ   0x00010000
-#define        USER_STACK_TOP  0x00800000
-#define        MM_USER_MAX     0xBC000000
-#define        MM_PPD_MIN      0xBC000000      // Per-Process Data
-#define        MM_PPD_VFS      0xBC000000      // 
-#define MM_PPD_CFG     0xBFFFF000      // 
-#define        MM_PPD_MAX      0xB0000000
+// - Base Defintions
 #define        KERNEL_BASE     0xC0000000
-#define        MM_KHEAP_BASE   0xC0400000      // C+4MiB
-#define        MM_KHEAP_MAX    0xCF000000      //
-#define MM_KERNEL_VFS  0xCF000000      // 
-#define MM_KUSER_CODE  0xCFFF0000      // 16 Pages
-#define        MM_MODULE_MIN   0xD0000000      // Lowest Module Address
-#define MM_MODULE_MAX  0xF0000000      // 512 MiB
-
 #define BITS   32
 
 // - Processor/Machine Specific Features
-#if ARCH == i386
-// Uses no advanced features
-# define       USE_MP  0
-# define       USE_PAE 0
-#elif ARCH == i586
-// All Enabled
-# define       USE_MP  1
-# define       USE_PAE 1
-#else
+#if ARCH != i386 && ARCH != i486 && ARCH != i586
 # error "Unknown architecture '" #ARCH "'"
 #endif
 
@@ -50,11 +27,45 @@
 # define       PHYS_BITS       32
 #endif
 
+#define __ASM__        __asm__ __volatile__
+
 // === MACROS ===
 typedef volatile int   tSpinlock;
-#define LOCK(lockptr)  do {int v=1;\
-       while(v)__asm__ __volatile__("lock xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));}while(0)
-#define        RELEASE(lockptr)        __asm__ __volatile__("lock andl $0, (%%edi)"::"D"(lockptr));
+#define IS_LOCKED(lockptr)     (!!(*(tSpinlock*)lockptr))
+/**
+ * \brief Inter-Process interrupt (does a Yield)
+ */
+#define LOCK(lockptr)  do {\
+       int v=1;\
+       while(v) {\
+               __ASM__("xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));\
+               if(v) Threads_Yield();\
+       }\
+}while(0)
+/**
+ * \brief Tight spinlock (does a HLT)
+ */
+#define TIGHTLOCK(lockptr)     do{\
+       int v=1;\
+       while(v) {\
+               __ASM__("xchgl %%eax,(%%edi)":"=a"(v):"a"(1),"D"(lockptr));\
+               if(v) __ASM__("hlt");\
+       }\
+}while(0)
+/**
+ * \brief Very Tight spinlock (short inter-cpu lock)
+ */
+#define VTIGHTLOCK(lockptr)    do{\
+       int v=1;\
+       while(v)__ASM__("xchgl %%eax,(%%edi)":"=a"(v):"a"(1),"D"(lockptr));\
+}while(0)
+/**
+ * \brief Release a held spinlock
+ */
+#define        RELEASE(lockptr)        __ASM__("lock andl $0, (%%edi)"::"D"(lockptr));
+/**
+ * \brief Halt the CPU
+ */
 #define        HALT()  __asm__ __volatile__ ("hlt")
 
 // === TYPES ===
@@ -105,18 +116,6 @@ typedef struct {
        Uint    Resvd4[1];      // SS
 } tSyscallRegs;
 
-typedef struct {
-       Uint16  LimitLow;
-       Uint16  BaseLow;
-       Uint8   BaseMid;
-       Uint8   Access;
-       struct {
-               unsigned LimitHi:       4;
-               unsigned Flags:         4;
-       } __attribute__ ((packed));
-       Uint8   BaseHi;
-} __attribute__ ((packed)) tGDT;
-
 typedef struct {
        #if USE_PAE
        Uint    PDPT[4];