// === FLAGS ===
#define DEBUG_TRACE_SWITCH 0
#define DEBUG_DISABLE_DOUBLEFAULT 1
-#define DEBUG_VERY_SLOW_SWITCH 0
+#define DEBUG_VERY_SLOW_PERIOD 0
// === CONSTANTS ===
// Base is 1193182
Uint8 State; // 0: Unavaliable, 1: Idle, 2: Active
Uint16 Resvd;
tThread *Current;
- tThread *IdleThread;
} tCPU;
// === IMPORTS ===
extern Uint Proc_CloneInt(Uint *ESP, Uint32 *CR3);
extern Uint32 gaInitPageDir[1024]; // start.asm
extern char Kernel_Stack_Top[];
-extern tShortSpinlock glThreadListLock;
extern int giNumCPUs;
extern int giNextTID;
extern tThread gThreadZero;
extern char IRQCommon[]; // Common IRQ handler code
extern char IRQCommon_handled[]; // IRQCommon call return location
extern char GetEIP_Sched_ret[]; // GetEIP call return location
-extern void Threads_AddToDelete(tThread *Thread);
extern void SwitchTasks(Uint NewSP, Uint *OldSP, Uint NewIP, Uint *OldIO, Uint CR3);
extern void Proc_InitialiseSSE(void);
extern void Proc_SaveSSE(Uint DestPtr);
//void ArchThreads_Init(void);
#if USE_MP
void MP_StartAP(int CPU);
+void MP_SendIPIVector(int CPU, Uint8 Vector);
void MP_SendIPI(Uint8 APICID, int Vector, int DeliveryMode);
#endif
void Proc_IdleThread(void *Ptr);
int giProc_BootProcessorID = 0;
tTSS gaTSSs[MAX_CPUS]; // TSS Array
#endif
-tCPU gaCPUs[MAX_CPUS];
+tCPU gaCPUs[MAX_CPUS] = {
+ {.Current = &gThreadZero}
+ };
tTSS *gTSSs = NULL; // Pointer to TSS array
tTSS gTSS0 = {0};
// --- Error Recovery ---
{
int i;
tMPTable_Ent *ents;
+ #if DUMP_MP_TABLE
Log("gMPFloatPtr = %p", gMPFloatPtr);
Log("*gMPFloatPtr = {");
Log("\t.Sig = 0x%08x", gMPFloatPtr->Sig);
gMPFloatPtr->Features[4]
);
Log("}");
-
+ #endif
+
mptable = (void*)( KERNEL_BASE|gMPFloatPtr->MPConfig );
+ #if DUMP_MP_TABLE
Log("mptable = %p", mptable);
Log("*mptable = {");
Log("\t.Sig = 0x%08x", mptable->Sig);
Log("\t.ExtendedTableLen = 0x%04x", mptable->ExtendedTableLen);
Log("\t.ExtendedTableChecksum = 0x%02x", mptable->ExtendedTableChecksum);
Log("}");
+ #endif
gpMP_LocalAPIC = (void*)MM_MapHWPages(mptable->LocalAPICMemMap, 1);
{
case 0: // Processor
entSize = 20;
+ #if DUMP_MP_TABLE
Log("%i: Processor", i);
Log("\t.APICID = %i", ents->Proc.APICID);
Log("\t.APICVer = 0x%02x", ents->Proc.APICVer);
Log("\t.CPUFlags = 0x%02x", ents->Proc.CPUFlags);
Log("\t.CPUSignature = 0x%08x", ents->Proc.CPUSignature);
Log("\t.FeatureFlags = 0x%08x", ents->Proc.FeatureFlags);
-
+ #endif
if( !(ents->Proc.CPUFlags & 1) ) {
Log("DISABLED");
break;
- #if DUMP_MP_TABLES
+ #if DUMP_MP_TABLE >= 2
case 1: // Bus
entSize = 8;
Log("%i: Bus", i);
outb(0x40, TIMER_DIVISOR&0xFF); // Low Byte of Divisor
outb(0x40, (TIMER_DIVISOR>>8)&0xFF); // High Byte
- Log("Timer Frequency %i.%03i Hz",
+ Log_Debug("Proc", "PIT Frequency %i.%03i Hz",
TIMER_BASE/TIMER_DIVISOR,
((Uint64)TIMER_BASE*1000/TIMER_DIVISOR)%1000
);
Log("APIC Count %i", giMP_TimerCount);
{
Uint64 freq = giMP_TimerCount;
- freq /= TIMER_DIVISOR;
freq *= TIMER_BASE;
+ freq /= TIMER_DIVISOR;
if( (freq /= 1000) < 2*1000)
Log("Bus Frequency %i KHz", freq);
else if( (freq /= 1000) < 2*1000)
}
#if USE_MP
+/**
+ * \brief Start an AP
+ */
void MP_StartAP(int CPU)
{
- Log("Starting AP %i (APIC %i)", CPU, gaCPUs[CPU].APICID);
+ Log_Log("Proc", "Starting AP %i (APIC %i)", CPU, gaCPUs[CPU].APICID);
// Set location of AP startup code and mark for a warm restart
*(Uint16*)(KERNEL_BASE|0x467) = (Uint)&APWait - (KERNEL_BASE|0xFFFF0);
giNumInitingCPUs ++;
}
+void MP_SendIPIVector(int CPU, Uint8 Vector)
+{
+ MP_SendIPI(gaCPUs[CPU].APICID, Vector, 0);
+}
+
/**
* \brief Send an Inter-Processor Interrupt
* \param APICID Processor's Local APIC ID
* \param Vector Argument of some kind
- * \param DeliveryMode Type of signal?
+ * \param DeliveryMode Type of signal
+ * \note 3A 10.5 "APIC/Handling Local Interrupts"
*/
void MP_SendIPI(Uint8 APICID, int Vector, int DeliveryMode)
{
// Hi
val = (Uint)APICID << 24;
- Log("*%p = 0x%08x", &gpMP_LocalAPIC->ICR[1], val);
+// Log("%p = 0x%08x", &gpMP_LocalAPIC->ICR[1], val);
gpMP_LocalAPIC->ICR[1].Val = val;
// Low (and send)
val = ((DeliveryMode & 7) << 8) | (Vector & 0xFF);
- Log("*%p = 0x%08x", &gpMP_LocalAPIC->ICR[0], val);
+// Log("%p = 0x%08x", &gpMP_LocalAPIC->ICR[0], val);
gpMP_LocalAPIC->ICR[0].Val = val;
}
#endif
void Proc_IdleThread(void *Ptr)
{
- tCPU *cpu = Ptr;
- cpu->IdleThread->ThreadName = strdup("Idle Thread");
- Threads_SetPriority( cpu->IdleThread, -1 ); // Never called randomly
- cpu->IdleThread->Quantum = 1; // 1 slice quantum
+ tCPU *cpu = &gaCPUs[GetCPUNum()];
+ cpu->Current->ThreadName = strdup("Idle Thread");
+ Threads_SetPriority( cpu->Current, -1 ); // Never called randomly
+ cpu->Current->Quantum = 1; // 1 slice quantum
for(;;) {
- HALT();
+ __asm__ __volatile__ ("sti"); // Make sure interrupts are enabled
+ __asm__ __volatile__ ("hlt"); // Make sure interrupts are enabled
Proc_Reschedule();
}
}
// Create Idle Task
tid = Proc_NewKThread(Proc_IdleThread, &gaCPUs[i]);
- gaCPUs[i].IdleThread = Threads_GetThread(tid);
// Start the AP
if( i != giProc_BootProcessorID ) {
gaCPUs[0].Current = &gThreadZero;
// Start interrupts and wait for APs to come up
- Log("Waiting for APs to come up\n");
+ Log_Debug("Proc", "Waiting for APs to come up");
__asm__ __volatile__ ("sti");
while( giNumInitingCPUs ) __asm__ __volatile__ ("hlt");
#else
// Create Idle Task
tid = Proc_NewKThread(Proc_IdleThread, &gaCPUs[0]);
- gaCPUs[0].IdleThread = Threads_GetThread(tid);
+// gaCPUs[0].IdleThread = Threads_GetThread(tid);
// Set current task
gaCPUs[0].Current = &gThreadZero;
-// while( gaCPUs[0].IdleThread == NULL )
-// Threads_Yield();
-
// Start Interrupts (and hence scheduler)
__asm__ __volatile__("sti");
#endif
__asm__ __volatile__ ("mov %0, %%ebp"::"r"(ebp));
}
+void Proc_ClearThread(tThread *Thread)
+{
+ Log_Warning("Proc", "TODO: Nuke address space etc");
+ if(Thread->SavedState.SSE) {
+ free(Thread->SavedState.SSE);
+ Thread->SavedState.SSE = NULL;
+ }
+}
+
int Proc_NewKThread(void (*Fcn)(void*), void *Data)
{
Uint esp;
newThread->SavedState.ESP = esp;
newThread->SavedState.EIP = (Uint)&NewTaskHeader;
newThread->SavedState.SSE = NULL;
- Log("New (KThread) %p, esp = %p\n", newThread->SavedState.EIP, newThread->SavedState.ESP);
+// Log("New (KThread) %p, esp = %p", newThread->SavedState.EIP, newThread->SavedState.ESP);
// MAGIC_BREAK();
Threads_AddActive(newThread);
// Check for errors
if( newThread->MemState.CR3 == 0 ) {
Log_Error("Proc", "Proc_Clone: MM_Clone failed");
- Threads_AddToDelete(newThread);
+ Threads_Delete(newThread);
return -1;
}
nextthread = Threads_GetNextToRun(cpu, curthread);
- if(!nextthread)
- nextthread = gaCPUs[cpu].IdleThread;
if(!nextthread || nextthread == curthread)
return ;
#if DEBUG_TRACE_SWITCH
- LogF("\nSwitching to task %i, CR3 = 0x%x, EIP = %p, ESP = %p\n",
- nextthread->TID,
- nextthread->MemState.CR3,
- nextthread->SavedState.EIP,
- nextthread->SavedState.ESP
- );
+ // HACK: Ignores switches to the idle threads
+ if( nextthread->TID == 0 || nextthread->TID > giNumCPUs )
+ {
+ LogF("\nSwitching CPU %i to %p (%i %s) - CR3 = 0x%x, EIP = %p, ESP = %p\n",
+ GetCPUNum(),
+ nextthread, nextthread->TID, nextthread->ThreadName,
+ nextthread->MemState.CR3,
+ nextthread->SavedState.EIP,
+ nextthread->SavedState.ESP
+ );
+ }
#endif
// Update CPU state
__asm__ __volatile__("mov %0, %%db0\n\t" : : "r"(nextthread) );
// Save FPU/MMX/XMM/SSE state
- if( curthread->SavedState.SSE )
+ if( curthread && curthread->SavedState.SSE )
{
Proc_SaveSSE( ((Uint)curthread->SavedState.SSE + 0xF) & ~0xF );
curthread->SavedState.bSSEModified = 0;
Proc_DisableSSE();
}
- SwitchTasks(
- nextthread->SavedState.ESP, &curthread->SavedState.ESP,
- nextthread->SavedState.EIP, &curthread->SavedState.EIP,
- nextthread->MemState.CR3
- );
+ if( curthread )
+ {
+ SwitchTasks(
+ nextthread->SavedState.ESP, &curthread->SavedState.ESP,
+ nextthread->SavedState.EIP, &curthread->SavedState.EIP,
+ nextthread->MemState.CR3
+ );
+ }
+ else
+ {
+ SwitchTasks(
+ nextthread->SavedState.ESP, 0,
+ nextthread->SavedState.EIP, 0,
+ nextthread->MemState.CR3
+ );
+ }
return ;
}
git.ucc.asn.au / tpg / acess2.git / blobdiff
UCC git Repository :: git.ucc.asn.au