Changed the x86 architecture to have tPAddr be 64-bits always

[tpg/acess2.git] / Kernel / arch / x86 / proc.c

diff --git a/Kernel/arch/x86/proc.c b/Kernel/arch/x86/proc.c
index 60f015b..8b2e49b 100644 (file)
--- a/Kernel/arch/x86/proc.c
+++ b/Kernel/arch/x86/proc.c
@@ -113,6 +113,10 @@ void ArchThreads_Init()
                gTSSs = &gTSS0;
        #if USE_MP
        }
+       #endif
+       
+       Log("sizeof(tTSS) = %i", sizeof(tTSS));
+       Log("sizeof(tGDT) = %i", sizeof(tGDT));
        
        // Initialise Double Fault TSS
        gGDT[5].LimitLow = sizeof(tTSS);
@@ -123,21 +127,23 @@ void ArchThreads_Init()
        gGDT[5].BaseMid = (Uint)&gDoubleFault_TSS >> 16;
        gGDT[5].BaseHi = (Uint)&gDoubleFault_TSS >> 24;
        
-       // Initialise TSS
+       #if USE_MP
+       // Initialise Normal TSS(s)
        for(pos=0;pos<giNumCPUs;pos++)
        {
        #else
        pos = 0;
        #endif
+               Log("pos = %i", pos);
                gTSSs[pos].SS0 = 0x10;
                gTSSs[pos].ESP0 = 0;    // Set properly by scheduler
+               gGDT[6+pos].BaseLow = ((Uint)(&gTSSs[pos])) & 0xFFFF;
+               gGDT[6+pos].BaseMid = ((Uint)(&gTSSs[pos])) >> 16;
+               gGDT[6+pos].BaseHi = ((Uint)(&gTSSs[pos])) >> 24;
                gGDT[6+pos].LimitLow = sizeof(tTSS);
                gGDT[6+pos].LimitHi = 0;
                gGDT[6+pos].Access = 0x89;      // Type
                gGDT[6+pos].Flags = 0x4;
-               gGDT[6+pos].BaseLow = (Uint)&gTSSs[pos] & 0xFFFF;
-               gGDT[6+pos].BaseMid = (Uint)&gTSSs[pos] >> 16;
-               gGDT[6+pos].BaseHi = (Uint)&gTSSs[pos] >> 24;
        #if USE_MP
        }
        for(pos=0;pos<giNumCPUs;pos++) {