More work on x86_64 port, near compiling now

[tpg/acess2.git] / Kernel / arch / x86_64 / include / arch.h

diff --git a/Kernel/arch/x86_64/include/arch.h b/Kernel/arch/x86_64/include/arch.h
index d812a51..0dc9927 100644 (file)
--- a/Kernel/arch/x86_64/include/arch.h
+++ b/Kernel/arch/x86_64/include/arch.h
@@ -5,17 +5,24 @@
 #ifndef _ARCH_H_
 #define _ARCH_H_
 
+#include <stdint.h>
 #define KERNEL_BASE    0xFFFF8000##00000000
+#define BITS   64
 
 // === Core Types ===
 typedef signed char    Sint8;
 typedef unsigned char  Uint8;
 typedef signed short   Sint16;
 typedef unsigned short Uint16;
-typedef signed long    Sint32;
-typedef unsigned long  Uint32;
-typedef signed long long       Sint64;
-typedef unsigned long long     Uint64;
+typedef signed int     Sint32;
+typedef unsigned int   Uint32;
+#if __WORDSIZE == 64
+typedef signed long int        Sint64;
+typedef unsigned long int      Uint64;
+#else
+typedef signed long long int   Sint64;
+typedef unsigned long long int Uint64;
+#endif
 
 typedef Uint64 Uint;
 typedef Uint64 tPAddr;
@@ -24,10 +31,38 @@ typedef Uint64      tVAddr;
 //typedef unsigned int size_t;
 typedef Uint64 size_t;
 
-typedef int    tSpinlock;
+typedef volatile int    tSpinlock;
+#define IS_LOCKED(lockptr)      (!!(*(tSpinlock*)lockptr))
+#define LOCK(lockptr)   do {int v=1;\
+       while(v)\
+       __asm__ __volatile__("lock xchgl %%eax, (%%rdi)":"=a"(v):"a"(1),"D"(lockptr));\
+       }while(0)
+#define RELEASE(lockptr)       __asm__ __volatile__("lock andl $0, (%%rdi)"::"D"(lockptr));
+#define HALT()  __asm__ __volatile__ ("hlt")
 
-#define LOCK(_ptr)
-#define RELEASE(_ptr)
+// Systemcall Registers
+// TODO: Fix this structure
+typedef struct sSyscallRegs
+{
+       union {
+               Uint    Num;
+               Uint    Return;
+       };      // RAX
+       Uint    Arg4;   // RCX
+       Uint    Arg3;   // RDX
+       Uint    Error;  // RBX
+       Uint    Resvd1[2];      // Kernel RSP, RBP
+       Uint    Arg2;   // RSI
+       Uint    Arg1;   // RDI
+       Uint    Arg5;   // R8
+       Uint    Arg6;   // R9
+       Uint    Resvd2[6];      // R10 - R15
+       Uint    Resvd3[5];      // IntNum, ErrCode, RIP, CS, RFLAGS
+       
+       Uint    Resvd4[5];      // Int, Err, rip, CS, ...
+       Uint    StackPointer;   // RSP
+       Uint    Resvd5[1];      // SS   
+}      tSyscallRegs;
 
 #endif