// MMX
// FPU
Uint FS, GS;
+
Uint RAX, RCX, RDX, RBX;
- Uint KernelRSP, RBP, RSI, RDI;
+ Uint KernelRSP, RBP, RSI, RDI;
Uint R8, R9, R10, R11;
Uint R12, R13, R14, R15;
- Uint IntNum, ErrorCode;
- Uint RIP, CS;
+
+ Uint IntNum, ErrorCode;
+ Uint RIP, CS;
Uint RFlags, RSP, SS;
} tRegs;
tPAddr CR3;
} tMemoryState;
+// 512 bytes, 16 byte aligned
+typedef struct sSSEState
+{
+ char data[512];
+} tSSEState;
+
/**
* \brief Task state for thread handler
*/
typedef struct sTaskState
{
- Uint RIP, RSP, RBP;
+ Uint RIP, RSP;
+ Uint64 UserRIP, UserCS;
+ tSSEState *SSE;
+ int bSSEModified;
} tTaskState;
+// === CONSTANTS ===
+#define KERNEL_STACK_SIZE 0x8000 // 32 KiB
+//#define KERNEL_STACK_SIZE 0x10000 // 64 KiB
+
#endif