Fixing up doxygen comments

[tpg/acess2.git] / Kernel / drv / dma.c

diff --git a/Kernel/drv/dma.c b/Kernel/drv/dma.c
index 0fae172..798a3e4 100644 (file)
--- a/Kernel/drv/dma.c
+++ b/Kernel/drv/dma.c
@@ -2,7 +2,8 @@
  * AcessOS 1.0\r
  * DMA Driver\r
  */\r
-#include <common.h>\r
+#include <acess.h>\r
+#include <modules.h>\r
 \r
 #define DMA_SIZE       (0x2400)\r
 #define DMA_ADDRESS(c) ((c)*DMA_SIZE+0x500)    //Save Space for IDT and BDA\r
@@ -11,11 +12,19 @@
 #define HIB(x) (((x)>>8)&0xFF)\r
 #define HIW(x) (((x)>>16)&0xFFFF)\r
 \r
-typedef struct {\r
-       int     mode;\r
+// === TYPES ===\r
+typedef struct\r
+{\r
+        int    mode;\r
        char    *address;\r
 } t_dmaChannel;\r
 \r
+// === PROTOTYPES ===\r
+ int   DMA_Install(char **Arguments);\r
+void   DMA_SetChannel(int Channel, int length, int read);\r
+ int   DMA_ReadData(int channel, int count, void *buffer);\r
+\r
+// === CONSTANTS ===\r
 const Uint8 cMASKPORT [8] = { 0x0A, 0x0A, 0x0A, 0x0A, 0xD4, 0xD4, 0xD4, 0xD4 };\r
 const Uint8 cMODEPORT [8] = { 0x0B, 0x0B, 0x0B, 0x0B, 0xD6, 0xD6, 0xD6, 0xD6 };\r
 const Uint8 cCLEARPORT[8] = { 0x0C, 0x0C, 0x0C, 0x0C, 0xD8, 0xD8, 0xD8, 0xD8 };\r
@@ -23,16 +32,19 @@ const Uint8 cPAGEPORT [8] = { 0x87, 0x83, 0x81, 0x82, 0x8F, 0x8B, 0x89, 0x8A };
 const Uint8 cADDRPORT [8] = { 0x00, 0x02, 0x04, 0x06, 0xC0, 0xC4, 0xC8, 0xCC };\r
 const Uint8 cCOUNTPORT[8] = { 0x01, 0x03, 0x05, 0x07, 0xC2, 0xC6, 0xCA, 0xCE };\r
 \r
+// === GLOBALS ===\r
+MODULE_DEFINE(0, 0x0100, ISADMA, DMA_Install, NULL, NULL);\r
 char   *dma_addresses[8];\r
 t_dmaChannel   dma_channels[8];\r
 \r
+// === CODE ===\r
 /**\r
- * \fn void DMA_Install()\r
  * \brief Initialise DMA channels\r
+ * \param Arguments    Arguments passed at boot time\r
  */\r
-void DMA_Install()\r
+int DMA_Install(char **Arguments)\r
 {\r
-       int i;\r
+       Uint    i;\r
        for(i=8;i--;)\r
        {\r
                outb( cMASKPORT[i], 0x04 | (i & 0x3) ); // mask channel\r
@@ -49,32 +61,33 @@ void DMA_Install()
                \r
                dma_channels[i].mode = 0;\r
                dma_addresses[i] = (char*)DMA_ADDRESS(i);\r
-               dma_addresses[i] += 0xC0000000;\r
+               dma_addresses[i] += KERNEL_BASE;\r
        }\r
+       return MODULE_ERR_OK;\r
 }\r
 \r
 /**\r
- * \fn void DMA_SetChannel(int channel, int length, int read)\r
+ * \fn void DMA_SetChannel(int Channel, int length, int read)\r
  * \brief Set DMA Channel Length and RW\r
  */\r
-void DMA_SetChannel(int channel, int length, int read)\r
+void DMA_SetChannel(int Channel, int length, int read)\r
 {\r
-       channel &= 7;\r
-       read = read && 1;\r
+       Uint    chan = Channel & 7;\r
+       read = !!read;\r
        if(length > DMA_SIZE)   length = DMA_SIZE;\r
        length --;      //Adjust for DMA\r
        //__asm__ __volatile__ ("cli");\r
-       outb( cMASKPORT[channel], 0x04 | (channel & 0x3) );             // mask channel\r
-       outb( cCLEARPORT[channel], 0x00 );\r
-       outb( cMODEPORT[channel], (0x44 + (!read)*4) | (channel & 0x3) );\r
-       outb( cADDRPORT[channel], LOWB(DMA_ADDRESS(channel)) );         // send address\r
-       outb( cADDRPORT[channel], HIB(DMA_ADDRESS(channel)) );          // send address\r
-       outb( cPAGEPORT[channel], HIW(DMA_ADDRESS(channel)) );          // send page\r
-       outb( cCOUNTPORT[channel], LOWB(length) );      // send size\r
-       outb( cCOUNTPORT[channel], HIB(length) );       // send size\r
-       outb( cMASKPORT[channel], channel & 0x3 );              // unmask channel\r
-       dma_addresses[channel] = (char*)DMA_ADDRESS(channel);\r
-       dma_addresses[channel] += 0xC0000000;\r
+       outb( cMASKPORT[chan], 0x04 | (chan & 0x3) );           // mask channel\r
+       outb( cCLEARPORT[chan], 0x00 );\r
+       outb( cMODEPORT[chan], (0x44 + (!read)*4) | (chan & 0x3) );\r
+       outb( cADDRPORT[chan], LOWB(DMA_ADDRESS(chan)) );               // send address\r
+       outb( cADDRPORT[chan], HIB(DMA_ADDRESS(chan)) );                // send address\r
+       outb( cPAGEPORT[chan], HIW(DMA_ADDRESS(chan)) );                // send page\r
+       outb( cCOUNTPORT[chan], LOWB(length) );      // send size\r
+       outb( cCOUNTPORT[chan], HIB(length) );       // send size\r
+       outb( cMASKPORT[chan], chan & 0x3 );              // unmask channel\r
+       dma_addresses[chan] = (char*)DMA_ADDRESS(chan);\r
+       dma_addresses[chan] += KERNEL_BASE;\r
        //__asm__ __volatile__ ("sti");\r
 }\r
 \r
@@ -92,3 +105,19 @@ int DMA_ReadData(int channel, int count, void *buffer)
        memcpy(buffer, dma_addresses[channel], count);\r
        return 0;\r
 }\r
+\r
+/**\r
+ * \fn void DMA_WriteData(int channel, int count, void *buffer)\r
+ * \brief Write data to a DMA buffer\r
+ */\r
+int DMA_WriteData(int channel, int count, void *buffer)\r
+{\r
+       if(channel < 0 || channel > 7)\r
+               return -1;\r
+       if(count < 0 || count > DMA_SIZE)\r
+               return -2;\r
+       \r
+       memcpy(dma_addresses[channel], buffer, count);\r
+       \r
+       return 0;\r
+}\r