/*\r
-AcessOS/AcessBasic v0.1\r
-PCI Bus Driver\r
-*/\r
-#include <common.h>\r
+ * AcessOS/AcessBasic v0.1\r
+ * PCI Bus Driver\r
+ */\r
+#define DEBUG 0\r
+#include <acess.h>\r
+#include <modules.h>\r
#include <vfs.h>\r
#include <fs_devfs.h>\r
#include <drv_pci.h>\r
\r
-#define DEBUG 0\r
#define LIST_DEVICES 1\r
\r
// === STRUCTURES ===\r
-typedef struct s_pciDevice {\r
+typedef struct sPCIDevice\r
+{\r
Uint16 bus, slot, fcn;\r
Uint16 vendor, device;\r
union {\r
- struct {Uint8 class, subclass;};\r
+ struct {\r
+ Uint8 class, subclass;\r
+ };\r
Uint16 oc;\r
};\r
Uint16 revision;\r
Uint32 ConfigCache[256/4];\r
char Name[8];\r
tVFS_Node Node;\r
-} t_pciDevice;\r
+} tPCIDevice;\r
\r
// === CONSTANTS ===\r
#define SPACE_STEP 5\r
Uint32 PCI_GetBAR5(int id);\r
Uint16 PCI_AssignPort(int id, int bar, int count);\r
\r
- int PCI_EnumDevice(Uint16 bus, Uint16 dev, Uint16 fcn, t_pciDevice *info);\r
+ int PCI_EnumDevice(Uint16 bus, Uint16 dev, Uint16 fcn, tPCIDevice *info);\r
Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset);\r
void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data);\r
Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset);\r
Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset);\r
\r
// === GLOBALS ===\r
-//MODULE_DEFINE(0, 0x0100, PCI, PCI_Install, NULL);\r
+MODULE_DEFINE(0, 0x0100, PCI, PCI_Install, NULL, NULL);\r
int giPCI_BusCount = 1;\r
int giPCI_InodeHandle = -1;\r
int giPCI_DeviceCount = 0;\r
-t_pciDevice *gPCI_Devices = NULL;\r
+tPCIDevice *gPCI_Devices = NULL;\r
tDevFS_Driver gPCI_DriverStruct = {\r
NULL, "pci",\r
{\r
.Flags = VFS_FFLAG_DIRECTORY,\r
+ .Size = -1,\r
.NumACLs = 1,\r
.ACLs = &gVFS_ACL_EveryoneRX,\r
.ReadDir = PCI_ReadDirRoot,\r
{\r
int bus, dev, fcn, i;\r
int space = 0;\r
- t_pciDevice devInfo;\r
+ tPCIDevice devInfo;\r
void *tmpPtr = NULL;\r
\r
// Build Portmap\r
gaPCI_PortBitmap[i] = -1;\r
for( i = 0; i < MAX_RESERVED_PORT % 32; i ++ )\r
gaPCI_PortBitmap[MAX_RESERVED_PORT / 32] = 1 << i;\r
- //LogF("Done.\n");\r
\r
// Scan Busses\r
for( bus = 0; bus < giPCI_BusCount; bus++ )\r
{\r
- for( dev = 0; dev < 10; dev++ ) // 10 Devices per bus\r
+ for( dev = 0; dev < 32; dev++ ) // 32 Devices per bus\r
{\r
- for( fcn = 0; fcn < 8; fcn++ ) // 8 functions per device\r
+ for( fcn = 0; fcn < 8; fcn++ ) // Max 8 functions per device\r
{\r
// Check if the device/function exists\r
if(!PCI_EnumDevice(bus, dev, fcn, &devInfo))\r
- {\r
continue;\r
- }\r
\r
if(giPCI_DeviceCount == space)\r
{\r
space += SPACE_STEP;\r
- tmpPtr = realloc(gPCI_Devices, space*sizeof(t_pciDevice));\r
+ tmpPtr = realloc(gPCI_Devices, space*sizeof(tPCIDevice));\r
if(tmpPtr == NULL)\r
break;\r
gPCI_Devices = tmpPtr;\r
if(devInfo.oc == PCI_OC_PCIBRIDGE)\r
{\r
#if LIST_DEVICES\r
- Log("[PCI ] Bridge @ %i,%i:%i (0x%x:0x%x)",\r
+ Log("[PCI ] Bridge @ %i,%i:%i (0x%x:0x%x)",\r
bus, dev, fcn, devInfo.vendor, devInfo.device);\r
#endif\r
giPCI_BusCount++;\r
}\r
+ else\r
+ {\r
+ #if LIST_DEVICES\r
+ Log("[PCI ] Device %i,%i:%i %04x => 0x%04x:0x%04x",\r
+ bus, dev, fcn, devInfo.oc, devInfo.vendor, devInfo.device);\r
+ #endif\r
+ }\r
+ \r
devInfo.Node.Inode = giPCI_DeviceCount;\r
- memcpy(&gPCI_Devices[giPCI_DeviceCount], &devInfo, sizeof(t_pciDevice));\r
+ memcpy(&gPCI_Devices[giPCI_DeviceCount], &devInfo, sizeof(tPCIDevice));\r
giPCI_DeviceCount ++;\r
- #if LIST_DEVICES\r
- Log("[PCI ] Device %i,%i:%i => 0x%x:0x%x",\r
- bus, dev, fcn, devInfo.vendor, devInfo.device);\r
- #endif\r
\r
// WTF is this for?\r
+ // Maybe bit 23 must be set for the device to be valid?\r
+ // - Actually, maybe 23 means that there are sub-functions\r
if(fcn == 0) {\r
if( !(devInfo.ConfigCache[3] & 0x800000) )\r
break;\r
if(tmpPtr != gPCI_Devices)\r
break;\r
}\r
- tmpPtr = realloc(gPCI_Devices, giPCI_DeviceCount*sizeof(t_pciDevice));\r
+ \r
+ if(giPCI_DeviceCount == 0)\r
+ return MODULE_ERR_NOTNEEDED;\r
+ \r
+ tmpPtr = realloc(gPCI_Devices, giPCI_DeviceCount*sizeof(tPCIDevice));\r
if(tmpPtr == NULL)\r
- return 0;\r
+ return MODULE_ERR_MALLOC;\r
gPCI_Devices = tmpPtr;\r
- //LogF("Done.\n");\r
\r
// Complete Driver Structure \r
gPCI_DriverStruct.RootNode.Size = giPCI_DeviceCount;\r
// And add to DevFS\r
DevFS_AddDevice(&gPCI_DriverStruct);\r
\r
- return 1;\r
+ return MODULE_ERR_OK;\r
}\r
\r
/**\r
- * \fn char *PCI_ReadDirRoot(tVFS_Node *node, int pos)\r
+ * \fn char *PCI_ReadDirRoot(tVFS_Node *Node, int Pos)\r
* \brief Read from Root of PCI Driver\r
*/\r
-char *PCI_ReadDirRoot(tVFS_Node *node, int pos)\r
-{ \r
- if(pos < 0 || pos >= giPCI_DeviceCount)\r
+char *PCI_ReadDirRoot(tVFS_Node *Node, int Pos)\r
+{\r
+ ENTER("pNode iPos", Node, Pos);\r
+ if(Pos < 0 || Pos >= giPCI_DeviceCount) {\r
+ LEAVE('n');\r
return NULL;\r
+ }\r
\r
- return gPCI_Devices[pos].Name;\r
+ LEAVE('s', gPCI_Devices[Pos].Name);\r
+ return strdup( gPCI_Devices[Pos].Name );\r
}\r
/**\r
* \fn tVFS_Node *PCI_FindDirRoot(tVFS_Node *node, char *filename)\r
\r
for( ; i < giPCI_DeviceCount; i++ )\r
{\r
- if((gPCI_Devices[i].oc & mask) != class) continue;\r
- return i;\r
+ if((gPCI_Devices[i].oc & mask) == class)\r
+ return i;\r
}\r
return -1;\r
}\r
Uint16 portVals;\r
int gran=0;\r
int i, j;\r
- t_pciDevice *dev;\r
+ tPCIDevice *dev;\r
\r
//LogF("PCI_AssignPort: (id=%i,bar=%i,count=%i)\n", id, bar, count);\r
\r
}\r
\r
/**\r
- * \fn int PCI_EnumDevice(Uint16 bus, Uint16 slot, Uint16 fcn, t_pciDevice *info)\r
+ * \fn int PCI_EnumDevice(Uint16 bus, Uint16 slot, Uint16 fcn, tPCIDevice *info)\r
*/\r
-int PCI_EnumDevice(Uint16 bus, Uint16 slot, Uint16 fcn, t_pciDevice *info)\r
+int PCI_EnumDevice(Uint16 bus, Uint16 slot, Uint16 fcn, tPCIDevice *info)\r
{\r
Uint16 vendor;\r
int i;\r
info->Name[2] = '.';\r
info->Name[3] = '0' + slot/10;\r
info->Name[4] = '0' + slot%10;\r
- info->Name[5] = '.';\r
+ info->Name[5] = ':';\r
info->Name[6] = '0' + fcn;\r
info->Name[7] = '\0';\r
\r
\r
\r
// === EXPORTS ===\r
-/*\r
+//*\r
EXPORT(PCI_CountDevices);\r
EXPORT(PCI_GetDevice);\r
+EXPORT(PCI_GetDeviceByClass);\r
EXPORT(PCI_AssignPort);\r
EXPORT(PCI_GetIRQ);\r
-*/\r
+//*/\r
git.ucc.asn.au / tpg / acess2.git / blobdiff
UCC git Repository :: git.ucc.asn.au