PCI_CfgWriteDWord(addr, dword);\r
}\r
\r
+Uint16 PCI_SetCommand(tPCIDev id, Uint16 SBits, Uint16 CBits)\r
+{\r
+ tPCIDevice *dev = &gPCI_Devices[id];\r
+ dev->ConfigCache[1] &= ~CBits;\r
+ dev->ConfigCache[1] |= SBits;\r
+ Uint32 addr = PCI_int_GetBusAddr(dev->bus, dev->slot, dev->fcn, 1*4);\r
+ PCI_CfgWriteDWord(addr, dev->ConfigCache[1]);\r
+ dev->ConfigCache[1] = PCI_CfgReadDWord(addr);\r
+ return dev->ConfigCache[1];\r
+}\r
+\r
/**\r
* \brief Get the IRQ assigned to a device\r
*/\r
return gPCI_Devices[id].ConfigCache[4+BARNum];\r
}\r
\r
+/**\r
+ */\r
+Uint64 PCI_GetValidBAR(tPCIDev ID, int BARNum, tPCI_BARType Type)\r
+{\r
+ if( ID < 0 || ID >= giPCI_DeviceCount )\r
+ return 0;\r
+ if( BARNum < 0 || BARNum >= 6 )\r
+ return 0;\r
+ tPCIDevice *dev = &gPCI_Devices[ID];\r
+ Uint32 bar_val = dev->ConfigCache[4+BARNum];\r
+ Uint64 ret = -1;\r
+ switch( Type )\r
+ {\r
+ case PCI_BARTYPE_IO:\r
+ if( !(bar_val & 1) )\r
+ return 0;\r
+ ret = bar_val & ~3;\r
+ break;\r
+\r
+ case PCI_BARTYPE_MEMNP:\r
+ if( bar_val & 8 ) return 0;\r
+ if(0) \r
+ case PCI_BARTYPE_MEMP:\r
+ if( !(bar_val & 8) ) return 0;\r
+ case PCI_BARTYPE_MEM:\r
+ if( bar_val & 1 ) return 0;\r
+ if( (bar_val & 6) == 4 ) {\r
+ ASSERTCR(BARNum, <, 5, 0);\r
+ ret = (bar_val & ~0xF) | ((Uint64)dev->ConfigCache[4+BARNum+1] << 32);\r
+ }\r
+ else {\r
+ ret = bar_val & ~0xF;\r
+ }\r
+ break;\r
+ case PCI_BARTYPE_MEM32:\r
+ if( bar_val & 1 ) return 0;\r
+ if( (bar_val & 6) != 0 ) return 0;\r
+ ret = bar_val & ~0xF;\r
+ break;\r
+ case PCI_BARTYPE_MEM64:\r
+ if( bar_val & 1 ) return 0;\r
+ if( (bar_val & 6) != 4 ) return 0;\r
+ ASSERTCR(BARNum, <, 5, 0);\r
+ ret = (bar_val & ~0xF) | ((Uint64)dev->ConfigCache[4+BARNum+1] << 32);\r
+ break;\r
+ }\r
+ ASSERT(ret != -1);\r
+ if( ret == 0 ) {\r
+ Log_Error("PCI", "PCI%i BAR%i correct type, but unallocated (0x%x)",\r
+ ID, BARNum, bar_val);\r
+ return 0;\r
+ }\r
+ return ret;\r
+}\r
+\r
/**\r
* \brief Get device information for a slot/function\r
*/\r