Modules/ATA - Fixed uninitialised variable

[tpg/acess2.git] / KernelLand / Modules / Storage / AHCI / ahci_hw.h

diff --git a/KernelLand/Modules/Storage/AHCI/ahci_hw.h b/KernelLand/Modules/Storage/AHCI/ahci_hw.h
index bbfcbd1..d74f822 100644 (file)
--- a/KernelLand/Modules/Storage/AHCI/ahci_hw.h
+++ b/KernelLand/Modules/Storage/AHCI/ahci_hw.h
@@ -8,10 +8,13 @@
 #ifndef _AHCI__AHCI_HW_H_
 #define _AHCI__AHCI_HW_H_
 
+#include "sata.h"
+
 #define AHCI_CAP_S64A  (1 << 31)       // Supports 64-bit addressing
 #define AHCI_CAP_SNCQ  (1 << 30)       // Supports Native Command Queuing
 #define AHCI_CAP_SXS   (1 << 5)        // Support External SATA
 #define AHCI_CAP_NCS   (31 << 8)       // Number of command slots (mask)
+#define AHCI_CAP_NCS_ofs       8       //                         (offset)
 
 #define AHCI_GHC_AE    (1 << 31)       // AHCI Enable
 #define AHCI_GHC_MRSM  (1 << 2)        // MSI Revert to Single Message
@@ -59,6 +62,21 @@
 #define AHCI_PxCMD_SUD (1 << 1)        // Spin-Up Device
 #define AHCI_PxCMD_ST  (1 << 0)        // Start
 
+#define AHCI_PxTFD_ERR (255 << 8)
+#define AHCI_PxTFD_STS (255 << 0)      // Status (latest copy of task file status register)
+#define AHCI_PxTFD_STS_BSY     (1 << 7)        // Interface is busy
+#define AHCI_PxTFD_STS_DRQ     (1 << 3)        // Data transfer requested
+#define AHCI_PxTFD_STS_ERR     (1 << 0)        // Error during transfer
+
+#define AHCI_PxSSTS_IPM        (15 << 8)       // Interface Power Management (0=NP,1=Active,2=Partial,6=Slumber)
+#define AHCI_PxSSTS_IPM_ofs    8
+#define AHCI_PxSSTS_SPD        (15 << 4)       // Current Interface Speed (0=NP,Generation n)
+#define AHCI_PxSSTS_SPD_ofs    4
+#define AHCI_PxSSTS_DET        (15 << 0)       // Device Detection (0: None, 1: Present but no PHY yet, 3: Present and PHY, 4: offline)
+#define AHCI_PxSSTS_DET_ofs    0
+
+typedef volatile struct sAHCI_MemSpace tAHCI_MemSpace;
+
 struct sAHCI_MemSpace
 {
        Uint32  CAP;    // Host Capabilities
@@ -99,6 +117,19 @@ struct sAHCI_MemSpace
        }       Ports[32];
 } PACKED;
 
+struct sAHCI_RcvdFIS
+{
+       struct sSATA_FIS_DMASetup       DSFIS;
+       Uint32  _pad1[1];
+       struct sSATA_FIS_PIOSetup       PSFIS;
+       Uint32  _pad2[3];
+       struct sSATA_FIS_D2HRegister    RFIS;
+       Uint32  _pad3[1];
+       struct sSATA_FIS_SDB    SDBFIS;
+       Uint32  UFIS[64/4];
+       Uint32  _redvd[(0x100 - 0xA0) / 4];
+} PACKED;
+
 struct sAHCI_CmdHdr
 {
        Uint16  Flags;
@@ -106,7 +137,13 @@ struct sAHCI_CmdHdr
        Uint32  PRDBC;
        Uint32  CTBA;   // 128-byte alignment
        Uint32  CTBAU;
-       Uint32  resdv[4];
+       union {
+               struct {
+                       struct sThread  *Thread;
+                       struct sAHCI_CmdTable   *TablePtr;
+               } PACKED Ptrs;
+               Uint32  resdv[4];
+       } Resvd;
 } PACKED;
 
 struct sAHCI_CmdEnt
@@ -117,5 +154,13 @@ struct sAHCI_CmdEnt
        Uint32  DBC;    // Data byte count (31: IOC, 21:0 count) 0=1, 1=2, ...
 } PACKED;
 
+struct sAHCI_CmdTable
+{
+       Uint32  CFIS[64/4];
+       Uint32  ACMD[16/4];
+       Uint32  _resvd[0x30/4];
+       struct sAHCI_CmdEnt     PRDT[0x80/16];
+} PACKED;
+
 #endif