#ifndef _OHCI_H_
#define _OHCI_H_
+typedef struct sOHCI_Controller tOHCI_Controller;
+typedef struct sEndpointDesc tOHCI_Endpoint;
+typedef struct sGeneralTD tOHCI_GeneralTD;
+
struct sEndpointDesc
{
// 0: 6 = Address
// 14 = Skip entry
// 15 = Format (Others, Isochronous)
// 16:26 = Max Packet Size
- // 27:31 = AVAIL
+ // 27:30 = AVAIL - Used for Controller ID
+ // 31 = AVAIL - Used for allocated flag (1 = allocated)
Uint32 Flags;
// 0: 3 = AVAIL
// 4:31 = TailP
// Address of final byte in buffer
Uint32 BE;
+
+ // -- Acess Information
+ Uint64 CbPointer;
+ Uint64 CbArg;
};
struct sIsochronousTD
Uint16 Offsets[8];
};
+struct sRegisters
+{
+ Uint32 HcRevision;
+ Uint32 HcControl;
+ Uint32 HcCommandStatus;
+ Uint32 HcInterruptStatus;
+ Uint32 HcInterruptEnable;
+ Uint32 HcInterruptDisable;
+
+ Uint32 HcHCCA;
+ Uint32 HcPeriodCurrentED;
+ Uint32 HcControlHeadED;
+ Uint32 HcControlCurrentED;
+ Uint32 HcBulkHeadED;
+ Uint32 HcBulkCurrentED;
+ Uint32 HcDoneHead;
+
+ Uint32 HcFmInterval;
+ Uint32 HcFmRemaining;
+ Uint32 HcFmNumber;
+ Uint32 HcPeriodicStart;
+ Uint32 HcLSThreshold;
+
+ // 0: 7 = NDP (Max of 15)
+ Uint32 HcRhDescriptorA;
+ Uint32 HcRhDescriptorB;
+ Uint32 HcRhStatus;
+ Uint32 HcRhPortStatus[15];
+};
+
+struct sHCCA
+{
+ Uint32 HccaInterruptTable[128/4];
+ Uint16 HccaFrameNumber;
+ Uint16 HccaPad1;
+ Uint32 HccaDoneHead;
+ Uint32 HccaReserved[116/4];
+};
+
+struct sOHCI_IntLists
+{
+ tOHCI_Endpoint Period16[16];
+ tOHCI_Endpoint Period8[8];
+ tOHCI_Endpoint Period4[4];
+ tOHCI_Endpoint Period2[2];
+ tOHCI_Endpoint Period1[1];
+ tOHCI_Endpoint StopED;
+};
+
+struct sOHCI_Controller
+{
+ int ID;
+
+ int PciId;
+ Uint IRQNum;
+ tPAddr ControlSpacePhys;
+
+ volatile struct sRegisters *ControlSpace;
+
+ tPAddr HCCAPhys;
+ volatile struct sHCCA *HCCA;
+ struct sOHCI_IntLists *IntLists; // At HCCA+512
+
+ int nPorts;
+ tUSBHub *RootHub;
+};
+
#endif