*
* Universal Host Controller Interface
*/
-#define DEBUG 1
+#define DEBUG 0
#define VERSION VER2(0,5)
#include <acess.h>
#include <vfs.h>
#include <semaphore.h>
// === CONSTANTS ===
-#define MAX_CONTROLLERS 4
+#define MAX_CONTROLLERS 8
//#define NUM_TDs 1024
-#define NUM_TDs 64
+#define NUM_TDs (PAGE_SIZE/sizeof(tUHCI_TD))
+#define MAX_PACKET_SIZE 0x400
+#define MAX_INTERRUPT_LOAD 1024 // Maximum bytes per frame for interrupts
+
+#define PID_IN 0x69
+#define PID_OUT 0xE1
+#define PID_SETUP 0x2D
// === PROTOTYPES ===
int UHCI_Initialise(char **Arguments);
void UHCI_Cleanup();
+ int UHCI_int_InitHost(tUHCI_Controller *Host);
+// -- List internals
tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont);
-void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD);
-void *UHCI_int_SendTransaction(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
-void *UHCI_DataIN(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
-void *UHCI_DataOUT(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
-void *UHCI_SendSetup(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
- int UHCI_IsTransferComplete(void *Ptr, void *Handle);
- int UHCI_Int_InitHost(tUHCI_Controller *Host);
+void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_QH *QH, tUHCI_TD *TD);
+tUHCI_TD *UHCI_int_CreateTD(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
+// --- API
+void *UHCI_InterruptIN(void *Ptr, int Dest, int Period, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
+void *UHCI_InterruptOUT(void *Ptr, int Dest, int Period, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
+void UHCI_StopInterrupt(void *Ptr, void *Handle);
+void *UHCI_ControlSETUP(void *Ptr, int Dest, int Tgl, void *Data, size_t Length);
+void *UHCI_ControlOUT(void *Ptr, int Dest, int Tgl, tUSBHostCb Cb, void *CbData, void *Data, size_t Length);
+void *UHCI_ControlIN(void *Ptr, int Dest, int Tgl, tUSBHostCb Cb, void *CbData, void *Data, size_t Length);
+void *UHCI_BulkOUT(void *Ptr, int Dest, int bToggle, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
+void *UHCI_BulkIN(void *Ptr, int Dest, int bToggle, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
+
void UHCI_CheckPortUpdate(void *Ptr);
void UHCI_int_InterruptThread(void *Unused);
void UHCI_InterruptHandler(int IRQ, void *Ptr);
// === GLOBALS ===
MODULE_DEFINE(0, VERSION, USB_UHCI, UHCI_Initialise, NULL, "USB_Core", NULL);
-tUHCI_TD gaUHCI_TDPool[NUM_TDs];
+tUHCI_TD *gaUHCI_TDPool;
tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];
tUSBHostDef gUHCI_HostDef = {
- .SendIN = UHCI_DataIN,
- .SendOUT = UHCI_DataOUT,
- .SendSETUP = UHCI_SendSetup,
- .IsOpComplete = UHCI_IsTransferComplete,
+ .InterruptIN = UHCI_InterruptIN,
+ .InterruptOUT = UHCI_InterruptOUT,
+ .StopInterrupt = UHCI_StopInterrupt,
+
+ .ControlSETUP = UHCI_ControlSETUP,
+ .ControlIN = UHCI_ControlIN,
+ .ControlOUT = UHCI_ControlOUT,
+
+ .BulkOUT = UHCI_BulkOUT,
+ .BulkIN = UHCI_BulkIN,
+
.CheckPorts = UHCI_CheckPortUpdate
};
tSemaphore gUHCI_InterruptSempahore;
LEAVE('i', MODULE_ERR_NOTNEEDED);
return MODULE_ERR_NOTNEEDED;
}
-
- // Spin off interrupt handling thread
- Proc_SpawnWorker( UHCI_int_InterruptThread, NULL );
+
+ {
+ tPAddr tmp;
+ gaUHCI_TDPool = (void *) MM_AllocDMA(1, 32, &tmp);
+ memset(gaUHCI_TDPool, 0, PAGE_SIZE);
+ }
// Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices
while( (id = PCI_GetDeviceByClass(0x0C0300, 0xFFFFFF, id)) >= 0 && i < MAX_CONTROLLERS )
IRQ_AddHandler(cinfo->IRQNum, UHCI_InterruptHandler, cinfo);
// Initialise Host
- ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);
+ ret = UHCI_int_InitHost(cinfo);
// Detect an error
if(ret != 0) {
LEAVE('i', ret);
return ret;
}
+
+ // Spin off interrupt handling thread
+ Proc_SpawnWorker( UHCI_int_InterruptThread, cinfo );
+
cinfo->RootHub = USB_RegisterHost(&gUHCI_HostDef, cinfo, 2);
LOG("cinfo->RootHub = %p", cinfo->RootHub);
{
}
+/**
+ * \brief Initialises a UHCI host controller
+ * \param Host Pointer - Host to initialise
+ */
+int UHCI_int_InitHost(tUHCI_Controller *Host)
+{
+ ENTER("pHost", Host);
+
+ // - 1 Page, 32-bit address
+ // - 1 page = 1024 4 byte entries
+ Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
+ if( !Host->FrameList ) {
+ Log_Warning("UHCI", "Unable to allocate frame list, aborting");
+ LEAVE('i', -1);
+ return -1;
+ }
+
+ Host->TDQHPage = (void *) MM_AllocDMA(1, 32, &Host->PhysTDQHPage);
+ if( !Host->TDQHPage ) {
+ // TODO: Clean up
+ Log_Warning("UHCI", "Unable to allocate QH page, aborting");
+ LEAVE('i', -1);
+ return -1;
+ }
+
+ // Fill frame list
+ // - The numbers 0...31, but bit reversed (16 (0b1000) = 1 (0b00001)
+ const int dest_offsets[] = {
+ 0,16,8,24,4,20,12,28,2,18,10,26,6,22,14,30,
+ 1,17,9,25,5,21,13,29,3,19,11,27,7,23,15,31
+ };
+ for( int i = 0; i < 1024; i ++ ) {
+ Uint32 addr = MM_GetPhysAddr( (tVAddr)&Host->TDQHPage->ControlQH );
+ Host->FrameList[i] = addr | 2;
+ }
+ for( int i = 0; i < 64; i ++ ) {
+ int ofs = dest_offsets[ i & (32-1) ] * 2 + (i >= 32);
+ Uint32 addr = Host->PhysTDQHPage + ofs * sizeof(tUHCI_QH);
+ LOG("Slot %i to (%i,%i,%i,%i) ms slots",
+ ofs, 0 + i*4, 256 + i*4, 512 + i*4, 768 + i*4);
+ Host->FrameList[ 0 + i*4] = addr | 2;
+ Host->FrameList[256 + i*4] = addr | 2;
+ Host->FrameList[512 + i*4] = addr | 2;
+ Host->FrameList[768 + i*4] = addr | 2;
+ }
+
+ // Build up interrupt binary tree
+ {
+ tUHCI_QH *dest = Host->TDQHPage->InterruptQHs;
+ Uint32 destphys = Host->PhysTDQHPage;
+
+ // Set up next pointer to index to i/2 in the next step
+ for( int _count = 64; _count > 1; _count /= 2 )
+ {
+ for( int i = 0; i < _count; i ++ ) {
+ dest[i].Next = destphys + (_count + i/2) * sizeof(tUHCI_QH) + 2;
+ dest[i].Child = 1;
+ }
+ dest += _count; destphys += _count * sizeof(tUHCI_QH);
+ }
+ // Skip padding, and move to control QH
+ dest->Next = MM_GetPhysAddr( (tVAddr)&Host->TDQHPage->BulkQH ) | 2;
+ dest->Child = 1;
+ }
+
+ // Set up control and bulk queues
+ Host->TDQHPage->ControlQH.Next = MM_GetPhysAddr( (tVAddr)&Host->TDQHPage->BulkQH ) | 2;
+ Host->TDQHPage->ControlQH.Child = 1;
+ Host->TDQHPage->BulkQH.Next = 1;
+ Host->TDQHPage->BulkQH.Child = 1;
+
+ // Global reset
+ _OutWord( Host, USBCMD, 4 );
+ Time_Delay(10);
+ _OutWord( Host, USBCMD, 0 );
+
+ // Allocate Frame List
+ // Set frame length to 1 ms
+ _OutByte( Host, SOFMOD, 64 );
+
+ // Set Frame List
+ _OutDWord( Host, FLBASEADD, Host->PhysFrameList );
+ _OutWord( Host, FRNUM, 0 );
+
+ // Enable Interrupts
+ _OutWord( Host, USBINTR, 0x000F );
+ PCI_ConfigWrite( Host->PciId, 0xC0, 2, 0x2000 );
+
+ // Enable processing
+ _OutWord( Host, USBCMD, 0x0001 );
+
+ LEAVE('i', 0);
+ return 0;
+}
+
+// --------------------------------------------------------------------
+// TDs and QH Allocation/Appending
+// --------------------------------------------------------------------
tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont)
{
static tMutex lock;
if(gaUHCI_TDPool[i]._info.bActive == 0)
{
gaUHCI_TDPool[i].Link = 1;
- gaUHCI_TDPool[i].Control = (1 << 23);
+ gaUHCI_TDPool[i].Control = TD_CTL_ACTIVE;
gaUHCI_TDPool[i]._info.bActive = 1;
- gaUHCI_TDPool[i]._info.bComplete = 0;
+ gaUHCI_TDPool[i]._info.QueueIndex = 128;
Mutex_Release( &lock );
return &gaUHCI_TDPool[i];
}
return NULL;
}
-void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD)
+void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_QH *QH, tUHCI_TD *TD)
{
static tMutex lock; // TODO: Should I use a shortlock (avoid being preempted)
Mutex_Acquire(&lock);
- #if 0
- int next_frame;
-
- next_frame = (_InWord(Cont, FRNUM) + 2) & (1024-1);
-
- TD->Control |= (1 << 24); // Ensure that there is an interrupt for each used frame
-
- TD->Link = Cont->FrameList[next_frame];
- Cont->FrameList[next_frame] = MM_GetPhysAddr( (tVAddr)TD );
- #else
-
- // TODO: Support other QHs
- tUHCI_QH *qh = &Cont->BulkQH;
-
// Ensure that there is an interrupt for each used frame
- TD->Control |= (1 << 24);
+ TD->Control |= TD_CTL_IOC;
+ TD->_info.QueueIndex = ((tVAddr)QH - (tVAddr)Cont->TDQHPage->InterruptQHs) / sizeof(tUHCI_QH);
+ LOG("TD(%p)->QueueIndex = %i", TD, TD->_info.QueueIndex);
+ // Update length
+ TD->Control &= ~0x7FF;
+ TD->Control |= (TD->Token >> 21) & 0x7FF;
// Stop controller
_OutWord( Cont, USBCMD, 0x0000 );
// Add
TD->Link = 1;
- if( qh->Child & 1 ) {
- qh->Child = MM_GetPhysAddr( (tVAddr)TD );
+ if( QH->Child & 1 ) {
+ QH->Child = MM_GetPhysAddr( (tVAddr)TD );
}
else {
- qh->_LastItem->Link = MM_GetPhysAddr( (tVAddr)TD );
+ // Depth first
+ QH->_LastItem->Link = MM_GetPhysAddr( (tVAddr)TD ) | 4;
}
- qh->_LastItem = TD;
+ QH->_LastItem = TD;
// Reenable controller
_OutWord( Cont, USBCMD, 0x0001 );
- #endif
+
+ // DEBUG!
+ LOG("QH(%p)->Child = %x", QH, QH->Child);
+ LOG("TD(%p)->Control = %x, ->Link = %x", TD, TD->Control, TD->Link);
Mutex_Release(&lock);
}
* \param Addr Function Address * 16 + Endpoint
* \param bTgl Data toggle value
*/
-void *UHCI_int_SendTransaction(
+tUHCI_TD *UHCI_int_CreateTD(
tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl,
tUSBHostCb Cb, void *CbData, void *Data, size_t Length)
{
}
td = UHCI_int_AllocateTD(Cont);
-
if( !td ) {
- // TODO: Wait for one to free?
Log_Error("UHCI", "No avaliable TDs, transaction dropped");
return NULL;
}
td, Length, Type, Addr);
td->Control = (Length - 1) & 0x7FF;
- td->Control |= (1 << 23);
+ td->Control |= TD_CTL_ACTIVE; // Active set
+ td->Control |= (3 << 27); // 3 retries
+ // High speed device (must be explicitly enabled
+ if( Addr & 0x8000 )
+ ;
+ else
+ td->Control |= 1 << 26;
+
td->Token = ((Length - 1) & 0x7FF) << 21;
td->Token |= (bTgl & 1) << 19;
td->Token |= (Addr & 0xF) << 15;
else
{
LOG("Relocated OUT/SETUP");
- tVAddr ptr = MM_MapTemp(td->BufferPointer);
- memcpy( (void*)ptr, Data, Length );
+ void *ptr = MM_MapTemp(td->BufferPointer);
+ memcpy( ptr, Data, Length );
MM_FreeTemp(ptr);
- td->Control |= (1 << 24);
+ td->Control |= TD_CTL_IOC;
}
td->_info.bFreePointer = 1;
}
if( !info )
info = calloc( sizeof(tUHCI_ExtraTDInfo), 1 );
LOG("IOC Cb=%p CbData=%p", Cb, CbData);
- // NOTE: if ERRPTR then the TD is kept allocated until checked
info->Callback = Cb;
info->CallbackPtr = CbData;
}
if( info ) {
LOG("info = %p", info);
- td->Control |= (1 << 24);
+ td->Control |= TD_CTL_IOC;
td->_info.ExtraInfo = info;
}
- UHCI_int_AppendTD(Cont, td);
-
return td;
}
-void *UHCI_DataIN(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
+void UHCI_int_SetInterruptPoll(tUHCI_Controller *Cont, tUHCI_TD *TD, int Period)
{
- return UHCI_int_SendTransaction(Ptr, Dest, 0x69, DataTgl, Cb, CbData, Buf, Length);
+ tUHCI_QH *qh;
+ const int qh_offsets[] = {126, 124, 120, 112, 96, 64, 0};
+ const int qh_sizes[] = { 1, 2, 4, 8, 16, 32, 64};
+
+ // Bounds limit
+ if( Period < 0 ) return ;
+ if( Period > 256 ) Period = 256;
+ if( Period == 255 ) Period = 256;
+
+ // Get the log base2 of the period
+ int period_slot = 0;
+ while( Period >>= 1 ) period_slot ++;
+
+ // Adjust for the 4ms minimum period
+ if( period_slot < 2 ) period_slot = 0;
+ else period_slot -= 2;
+
+ // _AppendTD calculates this from qh, but we use it to determine qh
+ TD->_info.QueueIndex = qh_offsets[period_slot];
+ // TODO: Find queue with lowest load
+#if 1
+ int min_load = 0;
+ int min_load_slot = 0;
+ for( int i = 0; i < qh_sizes[period_slot]; i ++ )
+ {
+ int load, index;
+ index = qh_offsets[period_slot] + i;
+ load = 0;
+ while( index >= 0 && index < 127 )
+ {
+ qh = Cont->TDQHPage->InterruptQHs + index;
+ load += Cont->InterruptLoad[index];
+ index = ((qh->Next & ~3) - Cont->PhysTDQHPage)/sizeof(tUHCI_QH);
+ }
+
+ LOG("Slot %i (and below) load %i", qh_offsets[period_slot] + i, load);
+
+ // i = 0 will initialise the values, otherwise update if lower
+ if( i == 0 || load < min_load )
+ {
+ min_load = load;
+ min_load_slot = i;
+ }
+ // - Fast return if no load
+ if( load == 0 ) break;
+ }
+ min_load_slot += qh_offsets[period_slot];
+ TD->_info.QueueIndex = min_load_slot;
+ if( min_load + (TD->Control & 0x7FF) > MAX_INTERRUPT_LOAD )
+ {
+ Log_Warning("UHCI", "Interrupt load on %i ms is too high (slot %i load %i bytes)",
+ 1 << (period_slot+2), min_load_slot, min_load
+ );
+ }
+ Cont->InterruptLoad[min_load_slot] += (TD->Control & 0x7FF);
+#endif
+ qh = Cont->TDQHPage->InterruptQHs + TD->_info.QueueIndex;
+
+ LOG("period_slot = %i, QueueIndex = %i",
+ period_slot, TD->_info.QueueIndex);
+
+ // Stop any errors causing the TD to stop (NAK will error)
+ // - If the device is unplugged, the removal code should remove the interrupt
+ TD->Control &= ~(3 << 27);
+
+ UHCI_int_AppendTD(Cont, qh, TD);
}
-void *UHCI_DataOUT(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
+void *UHCI_InterruptIN(void *Ptr, int Dest, int Period, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
{
- return UHCI_int_SendTransaction(Ptr, Dest, 0xE1, DataTgl, Cb, CbData, Buf, Length);
-}
+ tUHCI_TD *td;
-void *UHCI_SendSetup(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
+ if( Period < 0 ) return NULL;
+
+ ENTER("pPtr xDest iPeriod pCb pCbData pBuf iLength",
+ Ptr, Dest, Period, Cb, CbData, Buf, Length);
+
+ // TODO: Data toggle?
+ td = UHCI_int_CreateTD(Ptr, Dest, PID_IN, 0, Cb, CbData, Buf, Length);
+ if( !td ) return NULL;
+
+ UHCI_int_SetInterruptPoll(Ptr, td, Period);
+
+ LEAVE('p', td);
+ return td;
+}
+// TODO: Does interrupt OUT make sense?
+void *UHCI_InterruptOUT(void *Ptr, int Dest, int Period, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
{
- return UHCI_int_SendTransaction(Ptr, Dest, 0x2D, DataTgl, Cb, CbData, Buf, Length);
+ tUHCI_TD *td;
+
+ if( Period < 0 ) return NULL;
+
+ ENTER("pPtr xDest iPeriod pCb pCbData pBuf, iLength",
+ Ptr, Dest, Period, Cb, CbData, Buf, Length);
+
+ // TODO: Data toggle?
+ td = UHCI_int_CreateTD(Ptr, Dest, PID_OUT, 0, Cb, CbData, Buf, Length);
+ if( !td ) return NULL;
+
+ UHCI_int_SetInterruptPoll(Ptr, td, Period);
+
+ LEAVE('p', td);
+ return td;
}
-int UHCI_IsTransferComplete(void *Ptr, void *Handle)
+void UHCI_StopInterrupt(void *Ptr, void *Handle)
{
- tUHCI_TD *td = Handle;
- #if DEBUG
- tUHCI_Controller *Cont = &gUHCI_Controllers[0];
- LOG("%p->Control = %x", td, td->Control);
- LOG("USBSTS = 0x%x, USBINTR = 0x%x", _InWord(Cont, USBSTS), _InWord(Cont, USBINTR));
- LOG("Cont->BulkQH.Child = %x", Cont->BulkQH.Child);
- #endif
- if(td->Control & (1 << 23)) {
- return 0;
- }
-// LOG("inactive, waiting for completion");
- if(td->_info.bComplete)
- {
- td->_info.bActive = 0;
- td->_info.bComplete = 0;
- td->Link = 0;
- return 1;
- }
- else
- {
- return 0;
- }
+ // TODO: Stop interrupt transaction
+ Log_Error("UHCI", "TODO: Implement UHCI_StopInterrupt");
}
-// === INTERNAL FUNCTIONS ===
-/**
- * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)
- * \brief Initialises a UHCI host controller
- * \param Host Pointer - Host to initialise
- */
-int UHCI_Int_InitHost(tUHCI_Controller *Host)
+void *UHCI_ControlSETUP(void *Ptr, int Dest, int Tgl, void *Data, size_t Length)
{
- ENTER("pHost", Host);
+ tUHCI_Controller *Cont = Ptr;
+ tUHCI_QH *qh = &Cont->TDQHPage->ControlQH;
+ tUHCI_TD *td;
- _OutWord( Host, USBCMD, 4 ); // GRESET
- Time_Delay(10);
- _OutWord( Host, USBCMD, 0 ); // GRESET
+ ENTER("pPtr xDest iTgl pData iLength", Ptr, Dest, Tgl, Data, Length);
- // Allocate Frame List
- // - 1 Page, 32-bit address
- // - 1 page = 1024 4 byte entries
- Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
- if( !Host->FrameList ) {
- Log_Warning("UHCI", "Unable to allocate frame list, aborting");
- LEAVE('i', -1);
- return -1;
- }
+ td = UHCI_int_CreateTD(Cont, Dest, PID_SETUP, Tgl, NULL, NULL, Data, Length);
+ UHCI_int_AppendTD(Cont, qh, td);
- // TODO: Handle QHs not being in a 32-bit paddr range
- // Need another page, probably get some more TDs from it too
+ LEAVE('p', td);
- // Set up interrupt and bulk queue
- Host->InterruptQH.Next = MM_GetPhysAddr( (tVAddr)&Host->ControlQH ) | 2;
- Host->InterruptQH.Child = 1;
- Host->ControlQH.Next = MM_GetPhysAddr( (tVAddr)&Host->BulkQH ) | 2;
- Host->ControlQH.Child = 1;
- Host->BulkQH.Next = 1;
- Host->BulkQH.Child = 1;
+ return td;
+}
+void *UHCI_ControlOUT(void *Ptr, int Dest, int Tgl, tUSBHostCb Cb, void *CbData, void *Data, size_t Length)
+{
+ tUHCI_Controller *Cont = Ptr;
+ tUHCI_QH *qh = &Cont->TDQHPage->ControlQH;
+ tUHCI_TD *td;
- LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);
- for( int i = 0; i < 1024; i ++ )
- Host->FrameList[i] = MM_GetPhysAddr( (tVAddr)&Host->InterruptQH ) | 2;
-
- // Set frame length to 1 ms
- _OutByte( Host, SOFMOD, 64 );
+ ENTER("pPtr xDest iTgl pCb pCbData pData iLength", Ptr, Dest, Tgl, Cb, CbData, Data, Length);
+
+ td = UHCI_int_CreateTD(Cont, Dest, PID_OUT, Tgl, Cb, CbData, Data, Length);
+ UHCI_int_AppendTD(Cont, qh, td);
+
+ LEAVE('p', td);
+ return td;
+}
+void *UHCI_ControlIN(void *Ptr, int Dest, int Tgl, tUSBHostCb Cb, void *CbData, void *Data, size_t Length)
+{
+ tUHCI_Controller *Cont = Ptr;
+ tUHCI_QH *qh = &Cont->TDQHPage->ControlQH;
+ tUHCI_TD *td;
+
+ ENTER("pPtr xDest iTgl pCb pCbData pData iLength", Ptr, Dest, Tgl, Cb, CbData, Data, Length);
- // Set Frame List
- _OutDWord( Host, FLBASEADD, Host->PhysFrameList );
- _OutWord( Host, FRNUM, 0 );
+ td = UHCI_int_CreateTD(Cont, Dest, PID_IN, !!Tgl, Cb, CbData, Data, Length);
+ UHCI_int_AppendTD(Cont, qh, td);
+
+ LEAVE('p', td);
+ return td;
+}
+
+void *UHCI_BulkOUT(void *Ptr, int Dest, int bToggle, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
+{
+ tUHCI_Controller *Cont = Ptr;
+ tUHCI_QH *qh = &Cont->TDQHPage->BulkQH;
+ tUHCI_TD *td;
+ char *src = Buf;
+
+ ENTER("pPtr xDest ibToggle pCb pCbData pData iLength", Ptr, Dest, bToggle, Cb, CbData, Buf, Length);
+
+ if( Length > MAX_PACKET_SIZE ) {
+ Log_Error("UHCI", "Passed an oversized packet by the USB code (%i > %i)", Length, MAX_PACKET_SIZE);
+ LEAVE('n');
+ }
- // Enable Interrupts
- _OutWord( Host, USBINTR, 0x000F );
- PCI_ConfigWrite( Host->PciId, 0xC0, 2, 0x2000 );
+ td = UHCI_int_CreateTD(Cont, Dest, PID_OUT, bToggle, Cb, CbData, src, Length);
+ UHCI_int_AppendTD(Cont, qh, td);
- // Enable processing
- _OutWord( Host, USBCMD, 0x0001 );
+ LEAVE('p', td);
+ return td;
+}
+void *UHCI_BulkIN(void *Ptr, int Dest, int bToggle, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
+{
+ tUHCI_Controller *Cont = Ptr;
+ tUHCI_QH *qh = &Cont->TDQHPage->BulkQH;
+ tUHCI_TD *td;
+ char *dst = Buf;
- LEAVE('i', 0);
- return 0;
+ ENTER("pPtr xDest ibToggle pCb pCbData pData iLength", Ptr, Dest, bToggle, Cb, CbData, Buf, Length);
+ if( Length > MAX_PACKET_SIZE ) {
+ Log_Error("UHCI", "Passed an oversized packet by the USB code (%i > %i)", Length, MAX_PACKET_SIZE);
+ LEAVE('n');
+ }
+
+ td = UHCI_int_CreateTD(Cont, Dest, PID_IN, bToggle, Cb, CbData, dst, Length);
+ UHCI_int_AppendTD(Cont, qh, td);
+
+ LEAVE('p', td);
+ return td;
}
+// === INTERNAL FUNCTIONS ===
void UHCI_CheckPortUpdate(void *Ptr)
{
tUHCI_Controller *Host = Ptr;
}
}
-void UHCI_int_InterruptThread(void *Unused)
+tUHCI_TD *UHCI_int_GetTDFromPhys(tUHCI_Controller *Controller, Uint32 PAddr)
+{
+ if( PAddr >= Controller->PhysTDQHPage && PAddr < Controller->PhysTDQHPage + PAGE_SIZE )
+ {
+ PAddr -= Controller->PhysTDQHPage;
+ PAddr -= (128+2)*sizeof(tUHCI_QH);
+ if( PAddr > PAGE_SIZE ) return NULL; // Wrapping will bring above page size
+ PAddr /= sizeof(tUHCI_TD);
+ return &Controller->TDQHPage->LocalTDPool[PAddr];
+ }
+
+
+ tPAddr global_pool = MM_GetPhysAddr( (tVAddr)gaUHCI_TDPool );
+
+ if( PAddr < global_pool || PAddr >= global_pool + PAGE_SIZE ) return NULL;
+
+ PAddr -= global_pool;
+ PAddr /= sizeof(tUHCI_TD);
+ return &gaUHCI_TDPool[PAddr];
+}
+
+void UHCI_int_CleanQH(tUHCI_Controller *Cont, tUHCI_QH *QH)
+{
+ tUHCI_TD *td, *prev = NULL;
+ Uint32 cur_td;
+ int nCleaned = 0;
+
+ // Disable controller
+ _OutWord( Cont, USBCMD, 0x0000 );
+
+ // Scan QH list
+ cur_td = QH->Child;
+ LOG("cur_td = 0x%08x", cur_td);
+ while( !(cur_td & 1) )
+ {
+ td = UHCI_int_GetTDFromPhys(Cont, cur_td);
+ if(!td) {
+ Log_Warning("UHCI", "_int_CleanQH: QH %p contains TD %x, which was not from a pool",
+ QH, cur_td);
+ break ;
+ }
+
+ // Active? Ok.
+ if( td->Control & TD_CTL_ACTIVE ) {
+ LOG("%p still active", td);
+ prev = td;
+ cur_td = td->Link;
+ continue ;
+ }
+
+ LOG("Removed %p from QH %p", td, QH);
+
+ if( !prev )
+ QH->Child = td->Link;
+ else
+ prev->Link = td->Link;
+ cur_td = td->Link;
+ nCleaned ++;
+ }
+
+ if( nCleaned == 0 ) {
+ LOG("Nothing cleaned... what the?");
+ }
+
+ // re-enable controller
+ _OutWord( Cont, USBCMD, 0x0001 );
+}
+
+void UHCI_int_HandleTDComplete(tUHCI_Controller *Cont, tUHCI_TD *TD)
+{
+ int byte_count = (TD->Control & 0x7FF)+1;
+ tUHCI_ExtraTDInfo *info = TD->_info.ExtraInfo;
+
+ // Handle non page-aligned destination (or with a > 32-bit paddr)
+ // TODO: Needs fixing for alignment issues
+ if(info->FirstPage)
+ {
+ char *src, *dest;
+ int src_ofs = TD->BufferPointer & (PAGE_SIZE-1);
+ src = MM_MapTemp(TD->BufferPointer);
+ dest = MM_MapTemp(info->FirstPage);
+ // Check for a single page transfer
+ if( byte_count + info->Offset <= PAGE_SIZE )
+ {
+ LOG("Single page copy %P to %P of %p",
+ TD->BufferPointer, info->FirstPage, TD);
+ memcpy(dest + info->Offset, src + src_ofs, byte_count);
+ }
+ else
+ {
+ // Multi-page
+ LOG("Multi page copy %P to (%P,%P) of %p",
+ TD->BufferPointer, info->FirstPage, info->SecondPage, TD);
+ int part_len = PAGE_SIZE - info->Offset;
+ memcpy(dest + info->Offset, src + src_ofs, part_len);
+ MM_FreeTemp( dest );
+ dest = MM_MapTemp(info->SecondPage);
+ memcpy(dest, src + src_ofs + part_len, byte_count - part_len);
+ }
+ MM_FreeTemp( src );
+ MM_FreeTemp( dest );
+ }
+
+ // Callback
+ if( info->Callback != NULL )
+ {
+ LOG("Calling cb %p (%i bytes)", info->Callback, byte_count);
+ void *ptr = MM_MapTemp( TD->BufferPointer );
+ info->Callback( info->CallbackPtr, ptr, byte_count );
+ MM_FreeTemp( ptr );
+ }
+
+ // Clean up info
+ if( TD->_info.QueueIndex > 127 )
+ {
+ free( info );
+ TD->_info.ExtraInfo = NULL;
+ }
+}
+
+void UHCI_int_InterruptThread(void *Pointer)
{
+ tUHCI_Controller *Cont = Pointer;
Threads_SetName("UHCI Interrupt Handler");
for( ;; )
{
+ int nSeen = 0;
+
LOG("zzzzz....");
// 0 = Take all
Semaphore_Wait(&gUHCI_InterruptSempahore, 0);
for( int i = 0; i < NUM_TDs; i ++ )
{
- int byte_count;
- tUHCI_ExtraTDInfo *info;
tUHCI_TD *td;
td = &gaUHCI_TDPool[i];
- info = td->_info.ExtraInfo;
// Skip completely inactive TDs
if( td->_info.bActive == 0 ) continue ;
// Skip ones that are still in use
- if( td->Control & (1 << 23) ) continue ;
+ if( td->Control & TD_CTL_ACTIVE ) continue ;
+
+ nSeen ++;
// If no callback/alt buffer, mark as free and move on
if( td->_info.ExtraInfo )
{
- // Get size of transfer
- byte_count = (td->Control & 0x7FF)+1;
-
- // Handle non page-aligned destination (with a > 32-bit paddr)
- if(info->FirstPage)
- {
- char *src, *dest;
- int src_ofs = td->BufferPointer & (PAGE_SIZE-1);
- src = (void *) MM_MapTemp(td->BufferPointer);
- dest = (void *) MM_MapTemp(info->FirstPage);
- // Check for a single page transfer
- if( byte_count + info->Offset <= PAGE_SIZE )
- {
- LOG("Single page copy %P to %P of %p",
- td->BufferPointer, info->FirstPage, td);
- memcpy(dest + info->Offset, src + src_ofs, byte_count);
- }
- else
- {
- // Multi-page
- LOG("Multi page copy %P to (%P,%P) of %p",
- td->BufferPointer, info->FirstPage, info->SecondPage, td);
- int part_len = PAGE_SIZE - info->Offset;
- memcpy(dest + info->Offset, src + src_ofs, part_len);
- MM_FreeTemp( (tVAddr)dest );
- dest = (void *) MM_MapTemp(info->SecondPage);
- memcpy(dest, src + src_ofs + part_len, byte_count - part_len);
- }
- MM_FreeTemp( (tVAddr)src );
- MM_FreeTemp( (tVAddr)dest );
- }
+ UHCI_int_HandleTDComplete(Cont, td);
+ }
+
+ // Error check
+ if( td->Control & 0x00FF0000 ) {
+ LOG("td->control(Status) = %s%s%s%s%s%s%s%s",
+ td->Control & TD_CTL_ACTIVE ? "Active, " : "",
+ td->Control & TD_CTL_STALLED ? "Stalled, " : "",
+ td->Control & TD_CTL_DATABUFERR ? "Data Buffer Error, " : "",
+ td->Control & TD_CTL_BABBLE ? "Babble, " : "",
+ td->Control & TD_CTL_NAK ? "NAK, " : "",
+ td->Control & TD_CTL_CRCERR ? "CRC Error, " : "",
+ td->Control & TD_CTL_BITSTUFF ? "Bitstuff Error, " : "",
+ td->Control & TD_CTL_RESERVED ? "Reserved " : ""
+ );
+ LOG("From queue %i", td->_info.QueueIndex);
+ // Clean up QH (removing all inactive entries)
+ UHCI_int_CleanQH(Cont, Cont->TDQHPage->InterruptQHs + td->_info.QueueIndex);
+ td->Control = 0;
+ }
- // Don't mark as inactive, the check should do that
- if( info->Callback == INVLPTR )
- {
- LOG("Marking %p as complete", td);
- td->_info.bComplete = 1;
- free( info );
- td->_info.ExtraInfo = NULL;
- if( td->_info.bFreePointer )
- MM_DerefPhys( td->BufferPointer );
- continue ;
- }
-
- // Callback
- if( info->Callback != NULL )
- {
- LOG("Calling cb %p", info->Callback);
- void *ptr = (void *) MM_MapTemp( td->BufferPointer );
- info->Callback( info->CallbackPtr, ptr, byte_count );
- MM_FreeTemp( (tVAddr)ptr );
- }
-
- // Clean up info
- free( info );
- td->_info.ExtraInfo = NULL;
+ // Handle rescheduling of interrupt TDs
+ if( td->_info.QueueIndex <= 127 )
+ {
+ LOG("Re-schedule interrupt %p (offset %i)", td, td->_info.QueueIndex);
+ // TODO: Flip toggle?
+ td->Control |= TD_CTL_ACTIVE;
+ // Add back into controller's interrupt list
+ UHCI_int_AppendTD(
+ Cont,
+ Cont->TDQHPage->InterruptQHs + td->_info.QueueIndex,
+ td
+ );
+ continue ;
}
+ // Clean up
if( td->_info.bFreePointer )
- MM_DerefPhys( td->BufferPointer );
-
+ MM_DerefPhys( td->BufferPointer );
+
// Clean up
+ LOG("Cleaned %p (->Control = %x)", td, td->Control);
td->_info.bActive = 0;
- LOG("Cleaned %p", td);
+ }
+
+ if( nSeen == 0 ) {
+ LOG("Why did you wake me?");
}
}
}
// int frame = (_InWord(Host, FRNUM) - 1) & 0x3FF;
Uint16 status = _InWord(Host, USBSTS);
+ LOG("%p: status = 0x%04x", Ptr, status);
+
// Interrupt-on-completion
if( status & 1 )
{
Semaphore_Signal(&gUHCI_InterruptSempahore, 1);
}
- LOG("status = 0x%04x", status);
+ // USB Error Interrupt
+ if( status & 2 )
+ {
+
+ }
+
+ // Resume Detect
+ // - Fired if in suspend state and a USB device sends the RESUME signal
+ if( status & 4 )
+ {
+
+ }
+
+ // Host System Error
+ if( status & 8 )
+ {
+
+ }
+
+ // Host Controller Process Error
+ if( status & 0x10 )
+ {
+ Log_Error("UHCI", "Host controller process error on controller %p", Ptr);
+ }
+
_OutWord(Host, USBSTS, status);
}
git.ucc.asn.au / tpg / acess2.git / blobdiff
UCC git Repository :: git.ucc.asn.au