# Acess2 Module/Driver Templater Makefile
# Makefile.tpl
--include ../../Makefile.cfg
+_CPPFLAGS := $(CPPFLAGS)
-CPPFLAGS = -I../../Kernel/include -I../../Kernel/arch/$(ARCHDIR)/include -DARCH=$(ARCH)
-CFLAGS = -Wall -Werror $(CPPFLAGS)
+-include $(dir $(lastword $(MAKEFILE_LIST)))../Makefile.cfg
-OBJ := $(addsuffix .$(ARCH),$(OBJ))
-BIN = ../$(NAME).kmd.$(ARCH)
-KOBJ = ../$(NAME).xo.$(ARCH)
+CPPFLAGS := -I$(ACESSDIR)/Kernel/include -I$(ACESSDIR)/Kernel/arch/$(ARCHDIR)/include -DARCH=$(ARCH) $(_CPPFLAGS)
+CFLAGS := -Wall -Werror -fno-stack-protector -g -O3 -fno-builtin
-DEPFILES = $(filter %.o.$(ARCH),$(OBJ))
-DEPFILES := $(DEPFILES:%.o.$(ARCH)=%.d.$(ARCH))
+ifneq ($(CATEGORY),)
+ FULLNAME := $(CATEGORY)_$(NAME)
+else
+ FULLNAME := $(NAME)
+endif
+
+CPPFLAGS += -D_MODULE_NAME_=\"$(FULLNAME)\"
+
+ifneq ($(BUILDTYPE),static)
+ _SUFFIX := dyn_$(ARCH)
+ BIN := ../$(FULLNAME).kmd.$(ARCH)
+ CFLAGS += $(DYNMOD_CFLAGS) -fPIC
+else
+ _SUFFIX := st_$(ARCH)
+ CFLAGS += $(KERNEL_CFLAGS)
+ BIN := ../$(NAME).xo.$(ARCH)
+endif
+
+OBJ := $(addsuffix .$(_SUFFIX),$(OBJ))
+
+DEPFILES := $(filter %.o.$(_SUFFIX),$(OBJ))
+DEPFILES := $(DEPFILES:%.o.$(_SUFFIX)=%.d.$(ARCH))
.PHONY: all clean
all: $(BIN)
clean:
- $(RM) $(BIN) $(KOBJ) $(OBJ) $(DEPFILES)
+ $(RM) $(BIN) $(BIN).dsm $(KOBJ) $(OBJ) $(DEPFILES) $(EXTRA)
+
+install: $(BIN)
+ifneq ($(BUILDTYPE),static)
+ $(xMKDIR) $(DISTROOT)/Modules/$(ARCH)
+ $(xCP) $(BIN) $(DISTROOT)/Modules/$(ARCH)/$(NAME).kmd
+else
+endif
-$(BIN): $(OBJ)
+ifneq ($(BUILDTYPE),static)
+$(BIN): %.kmd.$(ARCH): $(OBJ)
+ @echo --- $(LD) -o $@
+# @$(LD) -T $(ACESSDIR)/Modules/link.ld --allow-shlib-undefined -shared -nostdlib -o $@ $(OBJ)
+ @$(LD) --allow-shlib-undefined -shared -nostdlib -o $@ $(OBJ) -defsym=DriverInfo=_DriverInfo_$(FULLNAME)
+ @$(DISASM) $(BIN) > $(BIN).dsm
+else
+$(BIN): %.xo.$(ARCH): $(OBJ)
@echo --- $(LD) -o $@
- @$(LD) -T ../link.ld -shared -nostdlib -o $@ $(OBJ)
-# @$(LD) -shared -nostdlib -o $@ $(OBJ)
- @echo --- $(LD) -o $(KOBJ)
- @$(CC) -Wl,-r -nostdlib -o $(KOBJ) $(OBJ)
+ @$(LD) -r -o $@ $(OBJ)
+endif
-%.o.$(ARCH): %.c Makefile ../Makefile.tpl ../../Makefile.cfg
+%.o.$(_SUFFIX): %.c Makefile ../Makefile.tpl $(CFGFILES)
@echo --- $(CC) -o $@
- @$(CC) $(CFLAGS) -o $@ -c $<
+ @$(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $<
@$(CC) -M $(CPPFLAGS) -MT $@ -o $*.d.$(ARCH) $<
-include $(DEPFILES)