Modules/ATA - Fiddling for bugfixing, bug was elsewhere though :)
[tpg/acess2.git] / Modules / Storage / ATA / io.c
index de6bf96..26fe6c0 100644 (file)
@@ -141,7 +141,7 @@ int ATA_SetupIO(void)
        }
        else {
                // Bit 0 is left set as a flag to other functions
-               LOG("gATA_BusMasterBase = 0x%x", gATA_BusMasterBase & ~1);
+               LOG("gATA_BusMasterBase = IO 0x%x", gATA_BusMasterBase & ~1);
        }
 
        // Register IRQs and get Buffers
@@ -164,6 +164,8 @@ int ATA_SetupIO(void)
        // Enable controllers
        outb(IDE_PRI_BASE+1, 1);
        outb(IDE_SEC_BASE+1, 1);
+       outb(IDE_PRI_CTRL, 0);
+       outb(IDE_SEC_CTRL, 0);
        
        // Make sure interrupts are ACKed
        ATA_int_BusMasterWriteByte(2, 0x4);
@@ -314,14 +316,14 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
 
        #if 1
        if( cont == 0 ) {
-               outb(base+IDE_PRI_CTRL, 4);
+               outb(IDE_PRI_CTRL, 4);
                IO_DELAY();
-               outb(base+IDE_PRI_CTRL, 0);
+               outb(IDE_PRI_CTRL, 0);
        }
        else {
-               outb(base+IDE_SEC_CTRL, 4);
+               outb(IDE_SEC_CTRL, 4);
                IO_DELAY();
-               outb(base+IDE_SEC_CTRL, 0);
+               outb(IDE_SEC_CTRL, 0);
        }
        #endif
 
@@ -378,8 +380,17 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
        LOG("Status byte = 0x%02x, Controller Status = 0x%02x",
                val, ATA_int_BusMasterReadByte(cont * 8 + 2));
 
-       if( gaATA_IRQs[cont] == 0 ) {
-               
+       if( gaATA_IRQs[cont] == 0 )
+       {
+               if( ATA_int_BusMasterReadByte(cont * 8 + 2) & 0x4 ) {
+                       Log_Error("ATA", "BM Status reports an interrupt, but none recieved");
+                       ATA_int_BusMasterWriteByte(cont*8 + 2, 4);      // Clear interrupt
+                       memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
+                       Mutex_Release( &glaATA_ControllerLock[ cont ] );
+                       LEAVE('i', 0);
+                       return 0;
+               }
+
                #if 1
                Debug_HexDump("ATA", Buffer, 512);
                #endif

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