wait for CLK_PERIOD;
start_i <= '1';
- str_read(input,str_in);
+ str_read(input_file,str_in);
opa_i <= strhex_to_slv(str_in);
- str_read(input,str_in);
+ str_read(input_file,str_in);
opb_i <= strhex_to_slv(str_in);
str_read(input_file,str_fpu_op);
- fpu_op_i <= to_std_logic_vector(str_fpu_op);
+ fpu_op_i <= strhex_to_slv(str_fpu_op)(2 downto 0);
str_read(input_file,str_rmode);
- rmode_i <= to_std_logic_vector(str_rmode);
-
- str_read(input_file,str_in);
- slv_out <= strhex_to_slv(str_in);
+ rmode_i <= strhex_to_slv(str_rmode)(1 downto 0);
+
+
wait for CLK_PERIOD;
start_i <= '0';
wait until ready_o='1';
+ --print("OpA"); print(hstr(opa_i));
+ --print("OpB"); print(hstr(opb_i));
+ --print("Opcode"); print(hstr(fpu_op_i));
+ --print("Rmode"); print(hstr(rmode_i));
+
+
print(hstr(output_o));
end loop;