Modules/Tegra2Vid - Hacking up some investigations :)
authorJohn Hodge <[email protected]>
Sat, 14 Jan 2012 14:36:30 +0000 (22:36 +0800)
committerJohn Hodge <[email protected]>
Sat, 14 Jan 2012 14:36:30 +0000 (22:36 +0800)
Modules/Display/Tegra2Vid/main.c
Modules/Display/Tegra2Vid/tegra2.h

index deae8f6..d9405be 100644 (file)
@@ -67,10 +67,47 @@ tVideo_IOCtl_Pos    gTegra2Vid_CursorPos;
 int Tegra2Vid_Install(char **Arguments)\r
 {\r
 //     KeyVal_Parse(&gTegra2Vid_KeyValueParser, Arguments);\r
-       \r
+\r
        gpTegra2Vid_IOMem = (void*)MM_MapHWPages(gTegra2Vid_PhysBase, 256/4);\r
+       {\r
+               Log_Debug("Tegra2Vid", "Display CMD Registers");\r
+               for( int i = 0x000; i <= 0x01A; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               for( int i = 0x028; i <= 0x043; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               Log_Debug("Tegra2Vid", "Display COM Registers");\r
+               for( int i = 0x300; i <= 0x329; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               Log_Debug("Tegra2Vid", "Display DISP Registers");\r
+               for( int i = 0x400; i <= 0x446; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               for( int i = 0x480; i <= 0x484; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               for( int i = 0x4C0; i <= 0x4C1; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+\r
+               Log_Debug("Tegra2Vid", "WINC_A Registers");\r
+               for( int i = 0x700; i <= 0x714; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+               Log_Debug("Tegra2Vid", "WINBUF_A");\r
+               for( int i = 0x800; i <= 0x80A; i ++ )\r
+                       Log_Debug("Tegra2Vid", "[0x%03x] = 0x%08x", i, gpTegra2Vid_IOMem[i]);\r
+       }\r
+//     return 1;\r
+       \r
+       giTegra2Vid_FramebufferSize =\r
+               (gpTegra2Vid_IOMem[DC_WIN_A_SIZE_0]&0xFFFF)\r
+               *(gpTegra2Vid_IOMem[DC_WIN_A_SIZE_0]>>16)*4;\r
+\r
+       Log_Debug("Tegra2Vid", "giTegra2Vid_FramebufferSize = 0x%x", giTegra2Vid_FramebufferSize);\r
+       gpTegra2Vid_Framebuffer = MM_MapHWPages(\r
+               gpTegra2Vid_IOMem[DC_WINBUF_A_START_ADDR_0],\r
+               (giTegra2Vid_FramebufferSize+PAGE_SIZE-1)/PAGE_SIZE\r
+               );\r
+       memset(gpTegra2Vid_Framebuffer, 0x1F, 0x1000);\r
+\r
 \r
-       Tegra2Vid_int_SetMode(4);\r
+//     Tegra2Vid_int_SetMode(4);\r
 \r
        DevFS_AddDevice( &gTegra2Vid_DriverStruct );\r
 \r
index b5666f3..a3f126b 100644 (file)
@@ -30,29 +30,29 @@ const int ciTegra2Vid_ModeCount = sizeof(caTegra2Vid_Modes)/sizeof(caTegra2Vid_M
 enum eTegra2_Disp_Regs
 {
        DC_DISP_DISP_SIGNAL_OPTIONS0_0 = 0x400,
-       DC_DISP_DISP_SIGNAL_OPTIONS1_0,
-       DC_DISP_DISP_WIN_OPTIONS_0,
-       DC_DISP_MEM_HIGH_PRIORITY_0,
-       DC_DISP_MEM_HIGH_PRIORITY_TIMER_0,
-       DC_DISP_DISP_TIMING_OPTIONS_0,
-       DC_DISP_REF_TO_SYNC_0,
-       DC_DISP_SYNC_WIDTH_0,
-       DC_DISP_BACK_PORCH_0,
-       DC_DISP_DISP_ACTIVE_0,
-       DC_DISP_FRONT_PORCH_0,
+       DC_DISP_DISP_SIGNAL_OPTIONS1_0, // 401
+       DC_DISP_DISP_WIN_OPTIONS_0,     // 402
+       DC_DISP_MEM_HIGH_PRIORITY_0,    // 403
+       DC_DISP_MEM_HIGH_PRIORITY_TIMER_0,      // 404
+       DC_DISP_DISP_TIMING_OPTIONS_0,  // 405
+       DC_DISP_REF_TO_SYNC_0,          // 406 (TrimSlice 0x0001 000B)
+       DC_DISP_SYNC_WIDTH_0,           // 407 (TrimSlice 0x0004 003A)
+       DC_DISP_BACK_PORCH_0,           // 408 (TrimSlice 0x0004 003A)
+       DC_DISP_DISP_ACTIVE_0,          // 409 (TrimSlice 0x0300 0400)
+       DC_DISP_FRONT_PORCH_0,          // 40A (TrimSlice 0x0004 003A)
 
-       DC_DISP_H_PULSE0_CONTROL_0,
+       DC_DISP_H_PULSE0_CONTROL_0,     // 40B
 
        DC_DISP_DISP_COLOR_CONTROL_0 = 0x430,
        
        DC_WINC_A_COLOR_PALETTE_0 = 0x500,
        DC_WINC_A_PALETTE_COLOR_EXT_0 = 0x600,
        DC_WIN_A_WIN_OPTIONS_0 = 0x700,
-       DC_WIN_A_BYTE_SWAP_0,
-       DC_WIN_A_BUFFER_CONTROL_0,
-       DC_WIN_A_COLOR_DEPTH_0,
-       DC_WIN_A_POSITION_0,
-       DC_WIN_A_SIZE_0,
+       DC_WIN_A_BYTE_SWAP_0,           // 701
+       DC_WIN_A_BUFFER_CONTROL_0,      // 702
+       DC_WIN_A_COLOR_DEPTH_0,         // 703
+       DC_WIN_A_POSITION_0,            // 704
+       DC_WIN_A_SIZE_0,                // 705 (TrimSlice 0x0300 0400)
        DC_WIN_A_PRESCALED_SIZE_0,
        DC_WIN_A_H_INITIAL_DDA_0,
        DC_WIN_A_V_INITIAL_DDA_0,

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