Kernel/ARMv7 - Fixed not using ASIDs

diff --git a/Kernel/arch/armv7/mm_virt.c b/Kernel/arch/armv7/mm_virt.c
index 0a92f35..830878e 100644 (file)
--- a/Kernel/arch/armv7/mm_virt.c
+++ b/Kernel/arch/armv7/mm_virt.c
@@ -37,7 +37,7 @@ typedef struct
 #define FRACTAL(table1, addr)  ((table1)[ (0xFF8/4*1024) + ((addr)>>22)])
 #define USRFRACTAL(addr)       (*((Uint32*)(0x7FDFF000) + ((addr)>>22)))
 #define TLBIALL()      __asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 0" : : "r" (0))
-#define TLBIMVA(addr)  __asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 1;dsb;isb" : : "r" ((addr)&~0xFFF):"memory")
+#define TLBIMVA(addr)  __asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 1;dsb;isb" : : "r" (((addr)&~0xFFF)|1):"memory")
 #define DCCMVAC(addr)  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 1" : : "r" ((addr)&~0xFFF))
 
 // === PROTOTYPES ===
@@ -166,8 +166,8 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi)
                                *desc = 0;
                                TLBIMVA( VAddr );
                                DCCMVAC( (tVAddr) desc );
-                               #warning "HACK: TLBIALL"
-                               TLBIALL();
+//                             #warning "HACK: TLBIALL"
+//                             TLBIALL();                              
                                LEAVE('i', 0);
                                return 0;
                        }
@@ -179,8 +179,8 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi)
                        *desc |= (pi->AP & 3) << 4;     // AP
                        *desc |= ((pi->AP >> 2) & 1) << 9;      // APX
                        TLBIMVA( VAddr );       
-                       #warning "HACK: TLBIALL"
-                       TLBIALL();
+//                     #warning "HACK: TLBIALL"
+//                     TLBIALL();
                        DCCMVAC( (tVAddr) desc );
                        LEAVE('i', 0);
                        return 0;

diff --git a/Kernel/arch/armv7/proc.S b/Kernel/arch/armv7/proc.S
index 531de29..8711dee 100644 (file)
--- a/Kernel/arch/armv7/proc.S
+++ b/Kernel/arch/armv7/proc.S
@@ -46,8 +46,8 @@ SwitchTask:
        ldr r1, [sp,#4*10]
        tst r1, r1
        mcrne p15, 0, r1, c2, c0, 0     @ Set TTBR0 to r0
-       mov r1, #0
-       mcrne p15, 0, r1, c8, c7, 0     @ TLBIALL - Invalidate all
+#      mov r1, #1
+       mcrne p15, 0, r1, c8, c7, 0     @ TLBIALL - Invalid user space
 
        @ Restore SP
        mov sp, r0

diff --git a/Kernel/arch/armv7/start.S b/Kernel/arch/armv7/start.S
index 8d9f3e4..113c8a4 100644 (file)
--- a/Kernel/arch/armv7/start.S
+++ b/Kernel/arch/armv7/start.S
@@ -45,12 +45,11 @@ _start:
        mrc p15, 0, r0, c1, c0, 0
        orr r0, r0, #1
        orr r0, r0, #1 << 23
-       mvn r1, #1 << 2
-       and r0, r0, r1
        mcr p15, 0, r0, c1, c0, 0
 
-       @ HACK! Disable caching
-       mrc p15, 0, r1, c1, c0, 0
+       @ HACK: Set ASID to non zero
+       mov r0, #1
+       MCR p15,0,r0,c13,c0,1
 
        ldr r2, =0xF1000000
        mov r1, #'s'

diff --git a/Kernel/drv/vterm.c b/Kernel/drv/vterm.c
index b4df6e3..e81f5e1 100644 (file)
--- a/Kernel/drv/vterm.c
+++ b/Kernel/drv/vterm.c
@@ -121,7 +121,7 @@ const Uint16        caVT100Colours[] = {
        };
 
 // === GLOBALS ===
-MODULE_DEFINE(0, VERSION, VTerm, VT_Install, NULL, DEFAULT_INPUT, NULL);
+MODULE_DEFINE(0, VERSION, VTerm, VT_Install, NULL, NULL);
 tDevFS_Driver  gVT_DrvInfo = {
        NULL, "VTerm",
        {
@@ -211,6 +211,9 @@ int VT_Install(char **Arguments)
        
        if(!gsVT_InputDevice)   gsVT_InputDevice = (char*)DEFAULT_INPUT;
        else if( Module_EnsureLoaded( gsVT_InputDevice ) )      gsVT_InputDevice = (char*)DEFAULT_INPUT;
+       if( Module_EnsureLoaded( gsVT_OutputDevice ) ) {
+               Log_Error("VTerm", "Fallback input '%s' is not avaliable, input will not be avaliable", DEFAULT_INPUT);
+       }
        
        // Create device paths
        {