Modules/AHCI - Moved FIS definitions to sata.h

diff --git a/KernelLand/Modules/Storage/AHCI/ahci_hw.h b/KernelLand/Modules/Storage/AHCI/ahci_hw.h
index 36cc74f..0610ad1 100644 (file)
--- a/KernelLand/Modules/Storage/AHCI/ahci_hw.h
+++ b/KernelLand/Modules/Storage/AHCI/ahci_hw.h
@@ -8,6 +8,8 @@
 #ifndef _AHCI__AHCI_HW_H_
 #define _AHCI__AHCI_HW_H_
 
+#include "sata.h"
+
 #define AHCI_CAP_S64A  (1 << 31)       // Supports 64-bit addressing
 #define AHCI_CAP_SNCQ  (1 << 30)       // Supports Native Command Queuing
 #define AHCI_CAP_SXS   (1 << 5)        // Support External SATA
@@ -115,32 +117,15 @@ struct sAHCI_MemSpace
        }       Ports[32];
 } PACKED;
 
-struct sAHCI_FIS_DMASetup
-{
-       Uint32  unk[7];
-} PACKED;
-struct sAHCI_FIS_PIOSetup
-{
-       Uint32  unk[5];
-} PACKED;
-struct sAHCI_FIS_D2HRegister
-{
-       Uint32  unk[5];
-} PACKED;
-struct sAHCI_FIS_SDB
-{
-       Uint32  unk[2];
-} PACKED;
-
 struct sAHCI_RcvdFIS
 {
-       struct sAHCI_FIS_DMASetup       DSFIS;
+       struct sSATA_FIS_DMASetup       DSFIS;
        Uint32  _pad1[1];
-       struct sAHCI_FIS_PIOSetup       PSFIS;
+       struct sSATA_FIS_PIOSetup       PSFIS;
        Uint32  _pad2[3];
-       struct sAHCI_FIS_D2HRegister    RFIS;
+       struct sSATA_FIS_D2HRegister    RFIS;
        Uint32  _pad3[1];
-       struct sAHCI_FIS_SDB    SDBFIS;
+       struct sSATA_FIS_SDB    SDBFIS;
        Uint32  UFIS[64/4];
        Uint32  _redvd[(0x100 - 0xA0) / 4];
 } PACKED;

diff --git a/KernelLand/Modules/Storage/AHCI/sata.h b/KernelLand/Modules/Storage/AHCI/sata.h
new file mode 100644 (file)
index 0000000..8a30085
--- /dev/null
+++ b/KernelLand/Modules/Storage/AHCI/sata.h
@@ -0,0 +1,79 @@
+/*
+ * Acess2 Kernel - AHCI Driver
+ * - By John Hodge (thePowersGang)
+ *
+ * sata.h
+ * - SATA Structures
+ */
+#ifndef _AHCI__SATA_H_
+#define _AHCI__SATA_H_
+
+enum eSATA_FIS_Types
+{
+       SATA_FIS_D2HRegister = 0x34,
+       SATA_FIS_DMASetup = 0x41,
+       SATA_FIS_PIOSetup = 0x5F,
+};
+
+struct sSATA_FIS_DMASetup
+{
+       Uint8   Type;   // = 0x41
+       Uint8   Flags;  // [6]: Interrupt, [5]: Direction
+       Uint8   _resvd1[2];
+       Uint32  DMABufIdLow;
+       Uint32  DMABufIdHigh;
+       Uint32  _resvd2[1];
+       Uint32  DMABufOfs;
+       Uint32  DMATransferCount;
+       Uint32  _resvd[1];
+} PACKED;
+struct sSATA_FIS_PIOSetup
+{
+       Uint8   Type;   // = 0x5F
+       Uint8   Flags;
+       Uint8   Status;
+       Uint8   Error;
+       Uint8   SectorNum;
+       Uint8   CylLow;
+       Uint8   CylHigh;
+       Uint8   Dev_Head;
+       Uint8   SectorNumExp;
+       Uint8   CylLowExp;
+       Uint8   CylHighExp;
+       Uint8   _resvd1[1];
+       Uint8   SectorCount;
+       Uint8   SectorCountExp;
+       Uint8   _resvd2[1];
+       Uint8   E_Status;
+       Uint16  TransferCount;
+       Uint8   _resvd3[2];
+} PACKED;
+struct sSATA_FIS_D2HRegister
+{
+       Uint8   Type;   // = 0x34
+       Uint8   IntResvd;       // [6]: Interrupt bit
+       Uint8   Status;
+       Uint8   Error;
+       Uint8   SectorNum;
+       Uint8   CylLow;
+       Uint8   CylHigh;
+       Uint8   Dev_Head;
+       Uint8   SectorNumExp;
+       Uint8   CylLowExp;
+       Uint8   CylHighExp;
+       Uint8   _resvd1[1];
+       Uint8   SectorCount;
+       Uint8   SectorCountExp;
+       Uint8   _resvd[6];
+} PACKED;
+struct sSATA_FIS_SDB
+{
+       Uint8   Type;   // = 0xA1
+       Uint8   IntResvd;
+       Uint8   Status;
+       Uint8   Error;
+       Uint32  _resvd[1];
+} PACKED;
+
+#endif
+