-BUILD_NUM = 1633
+BUILD_NUM = 1636
--- /dev/null
+/*
+ * Acess2 VM8086 BIOS Interface
+ * - By John Hodge (thePowersGang)
+ *
+ * vm8086.h
+ * - Core Header
+ */
+#ifndef _VM80806_H_
+#define _VM80806_H_
+
+// === TYPES ===
+typedef struct sVM8086
+{
+ Uint16 AX, CX, DX, BX;
+ Uint16 BP, SP, SI, DI;
+
+ Uint16 CS, SS, DS, ES;
+
+ Uint16 IP;
+} tVM8086;
+
+// === FUNCTIONS ===
+extern tVM8086 *VM8086_Init(void);
+extern void VM8086_Free(tVM8086 *State);
+extern void *VM8086_Allocate(tVM8086 *State, int Size, Uint16 *Segment, Uint16 *Ofs);
+extern void *VM8086_GetPointer(tVM8086 *State, Uint16 Segment, Uint16 Ofs);
+extern void VM8086_Int(tVM8086 *State, Uint8 Interrupt);
+
+#endif
Uint64 Size; //!< File Size
Uint32 Flags; //!< File Flags
+
+ /**
+ * Pointer to cached data (FS Specific)
+ * \note Inode_* will free when the node is uncached this if needed
+ */
+ void *Data;
/**
* \}
*/
\r
#define INT\r
\r
-// === TYPEDEFS ===\r
+// === TYPES ===\r
typedef struct {\r
Uint16 width;\r
Uint16 height;\r
if(ofs >= disk->BlockSize) {
block ++;
if( ofs > disk->BlockSize ) {
- Warning("[EXT2] Directory Entry %i of inode %i extends over a block boundary, ignoring",
+ Log_Warning("EXT2", "Directory Entry %i of inode %i extends over a block boundary, ignoring",
entNum-1, Node->Inode);
}
ofs = 0;
if(ofs >= disk->BlockSize) {
block ++;
if( ofs > disk->BlockSize ) {
- Warning("[EXT2 ] Directory Entry %i of inode %i extends over a block boundary, ignoring",
+ Log_Warning("EXT2", "Directory Entry %i of inode %i extends over a block boundary, ignoring",
entNum-1, Node->Inode);
}
ofs = 0;
//if(Name[0] == '.') retNode.Flags |= VFS_FFLAG_HIDDEN;
// Set Timestamps
- retNode.ATime = now();
+ retNode.ATime = inode.i_atime * 1000;
retNode.MTime = inode.i_mtime * 1000;
retNode.CTime = inode.i_ctime * 1000;
};\r
\r
// === CODE ===\r
-\r
/**\r
* \fn int Ext2_Install(char **Arguments)\r
* \brief Install the Ext2 Filesystem Driver\r
// Open Disk\r
fd = VFS_Open(Device, VFS_OPENFLAG_READ|VFS_OPENFLAG_WRITE); //Open Device\r
if(fd == -1) {\r
- Warning("[EXT2 ] Unable to open '%s'", Device);\r
+ Log_Warning("EXT2", "Unable to open '%s'", Device);\r
LEAVE('n');\r
return NULL;\r
}\r
\r
// Sanity Check Magic value\r
if(sb.s_magic != 0xEF53) {\r
- Warning("[EXT2 ] Volume '%s' is not an EXT2 volume", Device);\r
+ Log_Warning("EXT2", "Volume '%s' is not an EXT2 volume", Device);\r
VFS_Close(fd);\r
LEAVE('n');\r
return NULL;\r
// Allocate Disk Information\r
disk = malloc(sizeof(tExt2_Disk) + sizeof(tExt2_Group)*groupCount);\r
if(!disk) {\r
- Warning("[EXT2 ] Unable to allocate disk structure");\r
+ Log_Warning("EXT2", "Unable to allocate disk structure");\r
VFS_Close(fd);\r
LEAVE('n');\r
return NULL;\r
{\r
int group, subId;\r
\r
- //ENTER("pDisk iInodeId pInode", Disk, InodeId, Inode);\r
+ ENTER("pDisk iInodeId pInode", Disk, InodeId, Inode);\r
\r
if(InodeId == 0) return 0;\r
\r
group = InodeId / Disk->SuperBlock.s_inodes_per_group;\r
subId = InodeId % Disk->SuperBlock.s_inodes_per_group;\r
\r
- //LOG("group=%i, subId = %i", group, subId);\r
+ LOG("group=%i, subId = %i", group, subId);\r
\r
// Read Inode\r
VFS_ReadAt(Disk->FD,\r
sizeof(tExt2_Inode),\r
Inode);\r
\r
- //LEAVE('i', 1);\r
+ LEAVE('i', 1);\r
return 1;\r
}\r
\r
int group, subId;\r
ENTER("pDisk iInodeId pInode", Disk, InodeId, Inode);\r
\r
- if(InodeId == 0) return 0;\r
+ if(InodeId == 0) {\r
+ LEAVE('i', 0);\r
+ return 0;\r
+ }\r
\r
InodeId --; // Inodes are numbered starting at 1\r
\r
VFS_WriteAt(Disk->FD,\r
Disk->Groups[group].bg_inode_table * Disk->BlockSize + sizeof(tExt2_Inode)*subId,\r
sizeof(tExt2_Inode),\r
- Inode);\r
+ Inode\r
+ );\r
\r
LEAVE('i', 1);\r
return 1;\r
Uint32 Ext2_int_AllocateInode(tExt2_Disk *Disk, Uint32 Parent)\r
{\r
// Uint block = (Parent - 1) / Disk->SuperBlock.s_inodes_per_group;\r
+ Log_Warning("EXT2", "Ext2_int_AllocateInode is unimplemented");\r
return 0;\r
}\r
\r
base = Ext2_int_GetBlockAddr(disk, inode.i_block, allocSize/disk->BlockSize-1);
addBlocks:
- Warning("[EXT2 ] File extending is untested");
+ Log_Notice("EXT2", "File extending is untested");
// Allocate blocks and copy data to them
retLen = Length - (allocSize-Offset);
else
{
checkAll:
- Warning("[EXT2 ] TODO - Implement using blocks outside the current block group");
+ Log_Warning("EXT2", "TODO - Implement using blocks outside the current block group");
return 0;
}
--- /dev/null
+#
+#
+
+OBJ = main.o uhci.o
+NAME = USB
+
+-include ../Makefile.tpl
--- /dev/null
+/*
+ * Acess2
+ * USB Stack
+ */
+#define VERSION ( (0<<8)| 5 )
+#define DEBUG 1
+#include <acess.h>
+#include <vfs.h>
+#include <fs_devfs.h>
+#include <modules.h>
+#include "usb.h"
+
+// === IMPORTS ===
+ int UHCI_Initialise();
+
+// === PROTOTYPES ===
+ int USB_Install(char **Arguments);
+void USB_Cleanup();
+char *USB_ReadDir(tVFS_Node *Node, int Pos);
+tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name);
+ int USB_IOCtl(tVFS_Node *Node, int Id, void *Data);
+
+// === GLOBALS ===
+MODULE_DEFINE(0, VERSION, USB, USB_Install, NULL, NULL);
+tDevFS_Driver gUSB_DrvInfo = {
+ NULL, "usb", {
+ .NumACLs = 1,
+ .ACLs = &gVFS_ACL_EveryoneRX,
+ .Flags = VFS_FFLAG_DIRECTORY,
+ .ReadDir = USB_ReadDir,
+ .FindDir = USB_FindDir,
+ .IOCtl = USB_IOCtl
+ }
+};
+tUSBDevice *gUSB_Devices = NULL;
+tUSBHost *gUSB_Hosts = NULL;
+
+// === CODE ===
+/**
+ * \fn int ModuleLoad()
+ * \brief Called once module is loaded
+ */
+int USB_Install(char **Arguments)
+{
+ UHCI_Initialise();
+ Warning("[USB ] Not Complete - Devel Only");
+ return MODULE_ERR_OK;
+}
+
+/**
+ * \fn void USB_Cleanup()
+ * \brief Called just before module is unloaded
+ */
+void USB_Cleanup()
+{
+}
+
+/**
+ * \fn char *USB_ReadDir(tVFS_Node *Node, int Pos)
+ * \brief Read from the USB root
+ */
+char *USB_ReadDir(tVFS_Node *Node, int Pos)
+{
+ return NULL;
+}
+
+/**
+ * \fn tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name)
+ * \brief Locate an entry in the USB root
+ */
+tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name)
+{
+ return NULL;
+}
+
+/**
+ * \brief Handles IOCtl Calls to the USB driver
+ */
+int USB_IOCtl(tVFS_Node *Node, int Id, void *Data)
+{
+ return 0;
+}
--- /dev/null
+/*\r
+ * Acess 2 USB Stack\r
+ * Universal Host Controller Interface\r
+ */\r
+#define DEBUG 1\r
+#include <acess.h>\r
+#include <vfs.h>\r
+#include <drv_pci.h>\r
+#include "usb.h"\r
+#include "uhci.h"\r
+\r
+// === CONSTANTS ===\r
+#define MAX_CONTROLLERS 4\r
+#define NUM_TDs 1024\r
+\r
+// === PROTOTYPES ===\r
+ int UHCI_Initialise();\r
+void UHCI_Cleanup();\r
+ int UHCI_IOCtl(tVFS_Node *node, int id, void *data);\r
+ int UHCI_Int_InitHost(tUHCI_Controller *Host);\r
+\r
+// === GLOBALS ===
+//Uint gaFrameList[1024];\r
+tUHCI_TD gaUHCI_TDPool[NUM_TDs];\r
+tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];\r
+\r
+// === CODE ===\r
+/**\r
+ * \fn int UHCI_Initialise()\r
+ * \brief Called to initialise the UHCI Driver\r
+ */\r
+int UHCI_Initialise()\r
+{\r
+ int i=0, id=-1;\r
+ int ret;\r
+ Uint16 base;\r
+ \r
+ ENTER("");\r
+ \r
+ // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices\r
+ while( (id = PCI_GetDeviceByClass(0x0C03, 0xFFFF, id)) >= 0 && i < MAX_CONTROLLERS )\r
+ {\r
+ gUHCI_Controllers[i].PciId = id;\r
+ // Assign a port range (BAR4, Reserve 32 ports)\r
+ base = PCI_AssignPort( id, 4, 0x20 );\r
+ gUHCI_Controllers[i].IOBase = base;\r
+ \r
+ Log("[USB ] Controller PCI #%i: IO Base = 0x%x", id, base);\r
+ \r
+ // Initialise Host\r
+ ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);\r
+ // Detect an error\r
+ if(ret != 0) {\r
+ LEAVE('i', ret);\r
+ return ret;\r
+ }\r
+ \r
+ i ++;\r
+ }\r
+ if(i == MAX_CONTROLLERS) {\r
+ Warning("[UHCI ] Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");\r
+ }\r
+ LEAVE('i', i);\r
+ return i;\r
+}\r
+\r
+/**\r
+ * \fn void UHCI_Cleanup()\r
+ * \brief Called just before module is unloaded\r
+ */\r
+void UHCI_Cleanup()\r
+{\r
+}
+\r
+/**\r
+ * \brief Sends a packet to a device endpoint\r
+ */\r
+int UHCI_SendPacket(int ControllerId, int Length)\r
+{\r
+ //tUHCI_TD *td = UHCI_AllocateTD();\r
+ return 0;\r
+}\r
+\r
+// === INTERNAL FUNCTIONS ===\r
+/**\r
+ * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)\r
+ * \brief Initialises a UHCI host controller\r
+ * \param Host Pointer - Host to initialise\r
+ */\r
+int UHCI_Int_InitHost(tUHCI_Controller *Host)\r
+{\r
+ ENTER("pHost", Host);\r
+ \r
+ // Allocate Frame List\r
+ Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList); // 1 Page, 32-bit\r
+ if( !Host->FrameList ) {\r
+ Warning("[UHCI ] Unable to allocate frame list, aborting");\r
+ LEAVE('i', -1);\r
+ return -1;\r
+ }\r
+ LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);\r
+ memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)\r
+ \r
+ //! \todo Properly fill frame list\r
+ \r
+ // Set frame length to 1 ms\r
+ outb( Host->IOBase + SOFMOD, 64 );\r
+ \r
+ // Set Frame List Address\r
+ outd( Host->IOBase + FLBASEADD, Host->PhysFrameList );\r
+ \r
+ // Set Frame Number\r
+ outw( Host->IOBase + FRNUM, 0 );\r
+ \r
+ // Enable Interrupts\r
+ //PCI_WriteWord( Host->PciId, 0xC0, 0x2000 );\r
+ \r
+ LEAVE('i', 0);\r
+ return 0;\r
+}\r
--- /dev/null
+/*
+ * AcessOS Version 1
+ * USB Stack
+ * - Universal Host Controller Interface
+ */
+#ifndef _UHCI_H_
+#define _UHCI_H_
+
+// === TYPES ===
+typedef struct sUHCI_Controller tUHCI_Controller;
+typedef struct sUHCI_TD tUHCI_TD;
+typedef struct sUHCI_QH tUHCI_QH;
+
+// === STRUCTURES ===
+struct sUHCI_Controller
+{
+ /**
+ * \brief PCI Device ID
+ */
+ Uint16 PciId;
+
+ /**
+ * \brief IO Base Address
+ */
+ Uint16 IOBase;
+
+ /**
+ * \brief Frame list
+ *
+ * 31:4 - Frame Pointer
+ * 3:2 - Reserved
+ * 1 - QH/TD Selector
+ * 0 - Terminate (Empty Pointer)
+ */
+ Uint32 *FrameList;
+
+ /**
+ * \brief Physical Address of the Frame List
+ */
+ tPAddr PhysFrameList;
+};
+
+struct sUHCI_TD
+{
+ /**
+ * \brief Next Entry in list
+ *
+ * 31:4 - Address
+ * 3 - Reserved
+ * 2 - Depth/Breadth Select
+ * 1 - QH/TD Select
+ * 0 - Terminate (Last in List)
+ */
+ Uint32 Link;
+
+ /**
+ * \brief Control and Status Field
+ *
+ * 31:30 - Reserved
+ * 29 - Short Packet Detect (Input Only)
+ * 28:27 - Number of Errors Allowed
+ * 26 - Low Speed Device (Communicating with a low speed device)
+ * 25 - Isynchonious Select
+ * 24 - Interrupt on Completion (IOC)
+ * 23:16 - Status
+ * 23 - Active
+ * 22 - Stalled
+ * 21 - Data Buffer Error
+ * 20 - Babble Detected
+ * 19 - NAK Detected
+ * 18 - CRC/Timout Error
+ * 17 - Bitstuff Error
+ * 16 - Reserved
+ * 15:11 - Reserved
+ * 10:0 - Actual Length (Number of bytes transfered)
+ */
+ Uint32 Control;
+
+ /**
+ * \brief Packet Header
+ *
+ * 31:21 - Maximum Length (0=1, Max 0x4FF, 0x7FF=0)
+ * 20 - Reserved
+ * 19 - Data Toggle
+ * 18:15 - Endpoint
+ * 14:8 - Device Address
+ * 7:0 - PID (Packet Identifcation) - Only 96, E1, 2D allowed
+ */
+ Uint32 Token;
+
+ /**
+ * \brief Pointer to the data to send
+ */
+ Uint32 BufferPointer;
+};
+
+struct sUHCI_QH
+{
+ /**
+ * \brief Next Entry in list
+ *
+ * 31:4 - Address
+ * 3:2 - Reserved
+ * 1 - QH/TD Select
+ * 0 - Terminate (Last in List)
+ */
+ Uint32 Next;
+
+
+ /**
+ * \brief Next Entry in list
+ *
+ * 31:4 - Address
+ * 3:2 - Reserved
+ * 1 - QH/TD Select
+ * 0 - Terminate (Last in List)
+ */
+ Uint32 Child;
+};
+
+// === ENUMERATIONS ===
+enum eUHCI_IOPorts {
+ /**
+ * \brief USB Command Register
+ *
+ * 15:8 - Reserved
+ * 7 - Maximum Packet Size selector (1: 64 bytes, 0: 32 bytes)
+ * 6 - Configure Flag (No Hardware Effect)
+ * 5 - Software Debug (Don't think it will be needed)
+ * 4 - Force Global Resume
+ * 3 - Enter Global Suspend Mode
+ * 2 - Global Reset (Resets all devices on the bus)
+ * 1 - Host Controller Reset (Reset just the controller)
+ * 0 - Run/Stop
+ */
+ USBCMD = 0x00,
+ /**
+ * \brief USB Status Register
+ *
+ * 15:6 - Reserved
+ * 5 - HC Halted, set to 1 when USBCMD:RS is set to 0
+ * 4 - Host Controller Process Error (Errors related to the bus)
+ * 3 - Host System Error (Errors related to the OS/PCI Bus)
+ * 2 - Resume Detect (Set if a RESUME command is sent to the Controller)
+ * 1 - USB Error Interrupt
+ * 0 - USB Interrupts (Set if a transaction with the IOC bit set is completed)
+ */
+ USBSTS = 0x02,
+ /**
+ * \brief USB Interrupt Enable Register
+ *
+ * 15:4 - Reserved
+ * 3 - Short Packet Interrupt Enable
+ * 2 - Interrupt on Complete (IOC) Enable
+ * 1 - Resume Interrupt Enable
+ * 0 - Timout / CRC Error Interrupt Enable
+ */
+ USBINTR = 0x04,
+ /**
+ * \brief Frame Number (Index into the Frame List)
+ *
+ * 15:11 - Reserved
+ * 10:0 - Index (Incremented each approx 1ms)
+ */
+ FRNUM = 0x06,
+ /**
+ * \brief Frame List Base Address
+ *
+ * 31:12 - Pysical Address >> 12
+ * 11:0 - Reserved (Set to Zero)
+ */
+ FLBASEADD = 0x08, // 32-bit
+ /**
+ * \brief Start-of-frame Modify Register
+ * \note 8-bits only
+ *
+ * Sets the size of a frame
+ * Frequency = (11936+n)/12000 kHz
+ *
+ * 7 - Reserved
+ * 6:0 -
+ */
+ SOFMOD = 0x0C, // 8bit
+ /**
+ * \brief Port Status and Controll Register (Port 1)
+ *
+ * 15:13 - Reserved
+ * 12 - Suspend
+ * 11:10 - Reserved
+ * 9 - Port Reset
+ * 8 - Low Speed Device Attached
+ * 5:4 - Line Status
+ * 3 - Port Enable/Disable Change - Used for detecting device removal
+ * 2 - Port Enable/Disable
+ * 1 - Connect Status Change
+ * 0 - Current Connect Status
+ */
+ PORTSC1 = 0x10,
+ /**
+ * \brief Port Status and Controll Register (Port 2)
+ *
+ * See ::PORTSC1
+ */
+ PORTSC2 = 0x12
+};
+
+#endif
--- /dev/null
+/*
+ * Acess 2 USB Stack
+ * USB Packet Control
+ */
+#define DEBUG 1
+#include <acess.h>
+#include <vfs.h>
+#include <drv_pci.h>
+#include "usb.h"
+
+
+// === CODE ===
+void USB_MakeToken(void *Buf, int PID, int Addr, int EndP)
+{
+ Uint8 *tok = Buf;
+ int crc = 0;
+
+ tok[0] = PID & 0xFF;
+ tok[1] = (Addr & 0x7F) | ((EndP&1)<<7);
+ tok[2] = ((EndP >> 1) & 0x7) | crc;
+}
+
+#if 0
+void USB_SendData(int Controller, int Dev, int Endpoint, void *Data, int Length)
+{
+ Uint8 buf[Length+3+2/*?*/];
+
+ USB_MakeToken(buf, PID_DATA0, Dev, Endpoint);
+
+ switch(Controller & 0xF00)
+ {
+ case 1: // UHCI
+ UHCI_SendPacket(Controller & 0xFF);
+ break;
+ }
+}
+#endif
--- /dev/null
+/*
+ * AcessOS Version 1
+ * USB Stack
+ */
+#ifndef _USB_H_
+#define _USB_H_
+
+// === TYPES ===
+typedef struct sUSBHost tUSBHost;
+typedef struct sUSBDevice tUSBDevice;
+
+// === CONSTANTS ===
+enum eUSB_PIDs
+{
+ /**
+ * \name Token
+ * \{
+ */
+ PID_OUT = 0xE1,
+ PID_IN = 0x69,
+ PID_SOF = 0xA5,
+ PID_SETUP = 0x2D,
+ /**
+ * \}
+ */
+
+ /**
+ * \name Data
+ * \{
+ */
+ PID_DATA0 = 0xC3,
+ PID_DATA1 = 0x4B,
+ PID_DATA2 = 0x87, // USB2 only
+ PID_MDATA = 0x0F, // USB2 only
+ /**
+ * \}
+ */
+
+ /**
+ * \name Handshake
+ * \{
+ */
+ PID_ACK = 0xD2,
+ PID_NAK = 0x5A,
+ PID_STALL = 0x1E,
+ PID_NYET = 0x96,
+ /**
+ * \}
+ */
+
+ /**
+ * \name Special
+ * \{
+ */
+ PID_PRE = 0x3C, PID_ERR = 0x3C,
+ PID_SPLIT = 0x78,
+ PID_PING = 0xB4,
+ PID_RESVD = 0xF0,
+ /**
+ * \}
+ */
+};
+
+// === FUNCTIONS ===
+/**
+ * \note 00101 - X^5+X^2+1
+ */
+Uint8 USB_TokenCRC(void *Data, int len);
+/**
+ * \note X^16 + X15 + X^2 + 1
+ */
+Uint16 USB_DataCRC(void *Data, int len);
+
+// === STRUCTURES ===
+/**
+ * \brief Defines a USB Host Controller
+ */
+struct sUSBHost
+{
+ Uint16 IOBase;
+
+ int (*SendPacket)(int ID, int Length, void *Data);
+};
+
+/**
+ * \brief Defines a single device on the USB Bus
+ */
+struct sUSBDevice
+{
+ tUSBHost *Host;
+ int MaxControl;
+ int MaxBulk;
+ int MaxISync;
+};
+
+#endif
+++ /dev/null
-#
-#
-
-OBJ = main.o uhci.o
-NAME = USB
-
--include ../Makefile.tpl
+++ /dev/null
-/*
- * Acess2
- * USB Stack
- */
-#define VERSION ( (0<<8)| 5 )
-#define DEBUG 1
-#include <acess.h>
-#include <vfs.h>
-#include <fs_devfs.h>
-#include <modules.h>
-#include "usb.h"
-
-// === IMPORTS ===
- int UHCI_Initialise();
-
-// === PROTOTYPES ===
- int USB_Install(char **Arguments);
-void USB_Cleanup();
-char *USB_ReadDir(tVFS_Node *Node, int Pos);
-tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name);
- int USB_IOCtl(tVFS_Node *Node, int Id, void *Data);
-
-// === GLOBALS ===
-MODULE_DEFINE(0, VERSION, USB, USB_Install, NULL, NULL);
-tDevFS_Driver gUSB_DrvInfo = {
- NULL, "usb", {
- .NumACLs = 1,
- .ACLs = &gVFS_ACL_EveryoneRX,
- .Flags = VFS_FFLAG_DIRECTORY,
- .ReadDir = USB_ReadDir,
- .FindDir = USB_FindDir,
- .IOCtl = USB_IOCtl
- }
-};
-tUSBDevice *gUSB_Devices = NULL;
-tUSBHost *gUSB_Hosts = NULL;
-
-// === CODE ===
-/**
- * \fn int ModuleLoad()
- * \brief Called once module is loaded
- */
-int USB_Install(char **Arguments)
-{
- UHCI_Initialise();
- Warning("[USB ] Not Complete - Devel Only");
- return MODULE_ERR_OK;
-}
-
-/**
- * \fn void USB_Cleanup()
- * \brief Called just before module is unloaded
- */
-void USB_Cleanup()
-{
-}
-
-/**
- * \fn char *USB_ReadDir(tVFS_Node *Node, int Pos)
- * \brief Read from the USB root
- */
-char *USB_ReadDir(tVFS_Node *Node, int Pos)
-{
- return NULL;
-}
-
-/**
- * \fn tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name)
- * \brief Locate an entry in the USB root
- */
-tVFS_Node *USB_FindDir(tVFS_Node *Node, char *Name)
-{
- return NULL;
-}
-
-/**
- * \brief Handles IOCtl Calls to the USB driver
- */
-int USB_IOCtl(tVFS_Node *Node, int Id, void *Data)
-{
- return 0;
-}
+++ /dev/null
-/*\r
- * Acess 2 USB Stack\r
- * Universal Host Controller Interface\r
- */\r
-#define DEBUG 1\r
-#include <acess.h>\r
-#include <vfs.h>\r
-#include <drv_pci.h>\r
-#include "usb.h"\r
-#include "uhci.h"\r
-\r
-// === CONSTANTS ===\r
-#define MAX_CONTROLLERS 4\r
-#define NUM_TDs 1024\r
-\r
-// === PROTOTYPES ===\r
- int UHCI_Initialise();\r
-void UHCI_Cleanup();\r
- int UHCI_IOCtl(tVFS_Node *node, int id, void *data);\r
- int UHCI_Int_InitHost(tUHCI_Controller *Host);\r
-\r
-// === GLOBALS ===
-//Uint gaFrameList[1024];\r
-tUHCI_TD gaUHCI_TDPool[NUM_TDs];\r
-tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];\r
-\r
-// === CODE ===\r
-/**\r
- * \fn int UHCI_Initialise()\r
- * \brief Called to initialise the UHCI Driver\r
- */\r
-int UHCI_Initialise()\r
-{\r
- int i=0, id=-1;\r
- int ret;\r
- Uint16 base;\r
- \r
- ENTER("");\r
- \r
- // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices\r
- while( (id = PCI_GetDeviceByClass(0x0C03, 0xFFFF, id)) >= 0 && i < MAX_CONTROLLERS )\r
- {\r
- gUHCI_Controllers[i].PciId = id;\r
- // Assign a port range (BAR4, Reserve 32 ports)\r
- base = PCI_AssignPort( id, 4, 0x20 );\r
- gUHCI_Controllers[i].IOBase = base;\r
- \r
- Log("[USB ] Controller PCI #%i: IO Base = 0x%x", id, base);\r
- \r
- // Initialise Host\r
- ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);\r
- // Detect an error\r
- if(ret != 0) {\r
- LEAVE('i', ret);\r
- return ret;\r
- }\r
- \r
- i ++;\r
- }\r
- if(i == MAX_CONTROLLERS) {\r
- Warning("[UHCI ] Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");\r
- }\r
- LEAVE('i', i);\r
- return i;\r
-}\r
-\r
-/**\r
- * \fn void UHCI_Cleanup()\r
- * \brief Called just before module is unloaded\r
- */\r
-void UHCI_Cleanup()\r
-{\r
-}
-\r
-/**\r
- * \brief Sends a packet to a device endpoint\r
- */\r
-int UHCI_SendPacket(int ControllerId, int Length)\r
-{\r
- //tUHCI_TD *td = UHCI_AllocateTD();\r
- return 0;\r
-}\r
-\r
-// === INTERNAL FUNCTIONS ===\r
-/**\r
- * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)\r
- * \brief Initialises a UHCI host controller\r
- * \param Host Pointer - Host to initialise\r
- */\r
-int UHCI_Int_InitHost(tUHCI_Controller *Host)\r
-{\r
- ENTER("pHost", Host);\r
- \r
- // Allocate Frame List\r
- Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList); // 1 Page, 32-bit\r
- if( !Host->FrameList ) {\r
- Warning("[UHCI ] Unable to allocate frame list, aborting");\r
- LEAVE('i', -1);\r
- return -1;\r
- }\r
- LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);\r
- memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)\r
- \r
- //! \todo Properly fill frame list\r
- \r
- // Set frame length to 1 ms\r
- outb( Host->IOBase + SOFMOD, 64 );\r
- \r
- // Set Frame List Address\r
- outd( Host->IOBase + FLBASEADD, Host->PhysFrameList );\r
- \r
- // Set Frame Number\r
- outw( Host->IOBase + FRNUM, 0 );\r
- \r
- // Enable Interrupts\r
- //PCI_WriteWord( Host->PciId, 0xC0, 0x2000 );\r
- \r
- LEAVE('i', 0);\r
- return 0;\r
-}\r
+++ /dev/null
-/*
- * AcessOS Version 1
- * USB Stack
- * - Universal Host Controller Interface
- */
-#ifndef _UHCI_H_
-#define _UHCI_H_
-
-// === TYPES ===
-typedef struct sUHCI_Controller tUHCI_Controller;
-typedef struct sUHCI_TD tUHCI_TD;
-typedef struct sUHCI_QH tUHCI_QH;
-
-// === STRUCTURES ===
-struct sUHCI_Controller
-{
- /**
- * \brief PCI Device ID
- */
- Uint16 PciId;
-
- /**
- * \brief IO Base Address
- */
- Uint16 IOBase;
-
- /**
- * \brief Frame list
- *
- * 31:4 - Frame Pointer
- * 3:2 - Reserved
- * 1 - QH/TD Selector
- * 0 - Terminate (Empty Pointer)
- */
- Uint32 *FrameList;
-
- /**
- * \brief Physical Address of the Frame List
- */
- tPAddr PhysFrameList;
-};
-
-struct sUHCI_TD
-{
- /**
- * \brief Next Entry in list
- *
- * 31:4 - Address
- * 3 - Reserved
- * 2 - Depth/Breadth Select
- * 1 - QH/TD Select
- * 0 - Terminate (Last in List)
- */
- Uint32 Link;
-
- /**
- * \brief Control and Status Field
- *
- * 31:30 - Reserved
- * 29 - Short Packet Detect (Input Only)
- * 28:27 - Number of Errors Allowed
- * 26 - Low Speed Device (Communicating with a low speed device)
- * 25 - Isynchonious Select
- * 24 - Interrupt on Completion (IOC)
- * 23:16 - Status
- * 23 - Active
- * 22 - Stalled
- * 21 - Data Buffer Error
- * 20 - Babble Detected
- * 19 - NAK Detected
- * 18 - CRC/Timout Error
- * 17 - Bitstuff Error
- * 16 - Reserved
- * 15:11 - Reserved
- * 10:0 - Actual Length (Number of bytes transfered)
- */
- Uint32 Control;
-
- /**
- * \brief Packet Header
- *
- * 31:21 - Maximum Length (0=1, Max 0x4FF, 0x7FF=0)
- * 20 - Reserved
- * 19 - Data Toggle
- * 18:15 - Endpoint
- * 14:8 - Device Address
- * 7:0 - PID (Packet Identifcation) - Only 96, E1, 2D allowed
- */
- Uint32 Token;
-
- /**
- * \brief Pointer to the data to send
- */
- Uint32 BufferPointer;
-};
-
-struct sUHCI_QH
-{
- /**
- * \brief Next Entry in list
- *
- * 31:4 - Address
- * 3:2 - Reserved
- * 1 - QH/TD Select
- * 0 - Terminate (Last in List)
- */
- Uint32 Next;
-
-
- /**
- * \brief Next Entry in list
- *
- * 31:4 - Address
- * 3:2 - Reserved
- * 1 - QH/TD Select
- * 0 - Terminate (Last in List)
- */
- Uint32 Child;
-};
-
-// === ENUMERATIONS ===
-enum eUHCI_IOPorts {
- /**
- * \brief USB Command Register
- *
- * 15:8 - Reserved
- * 7 - Maximum Packet Size selector (1: 64 bytes, 0: 32 bytes)
- * 6 - Configure Flag (No Hardware Effect)
- * 5 - Software Debug (Don't think it will be needed)
- * 4 - Force Global Resume
- * 3 - Enter Global Suspend Mode
- * 2 - Global Reset (Resets all devices on the bus)
- * 1 - Host Controller Reset (Reset just the controller)
- * 0 - Run/Stop
- */
- USBCMD = 0x00,
- /**
- * \brief USB Status Register
- *
- * 15:6 - Reserved
- * 5 - HC Halted, set to 1 when USBCMD:RS is set to 0
- * 4 - Host Controller Process Error (Errors related to the bus)
- * 3 - Host System Error (Errors related to the OS/PCI Bus)
- * 2 - Resume Detect (Set if a RESUME command is sent to the Controller)
- * 1 - USB Error Interrupt
- * 0 - USB Interrupts (Set if a transaction with the IOC bit set is completed)
- */
- USBSTS = 0x02,
- /**
- * \brief USB Interrupt Enable Register
- *
- * 15:4 - Reserved
- * 3 - Short Packet Interrupt Enable
- * 2 - Interrupt on Complete (IOC) Enable
- * 1 - Resume Interrupt Enable
- * 0 - Timout / CRC Error Interrupt Enable
- */
- USBINTR = 0x04,
- /**
- * \brief Frame Number (Index into the Frame List)
- *
- * 15:11 - Reserved
- * 10:0 - Index (Incremented each approx 1ms)
- */
- FRNUM = 0x06,
- /**
- * \brief Frame List Base Address
- *
- * 31:12 - Pysical Address >> 12
- * 11:0 - Reserved (Set to Zero)
- */
- FLBASEADD = 0x08, // 32-bit
- /**
- * \brief Start-of-frame Modify Register
- * \note 8-bits only
- *
- * Sets the size of a frame
- * Frequency = (11936+n)/12000 kHz
- *
- * 7 - Reserved
- * 6:0 -
- */
- SOFMOD = 0x0C, // 8bit
- /**
- * \brief Port Status and Controll Register (Port 1)
- *
- * 15:13 - Reserved
- * 12 - Suspend
- * 11:10 - Reserved
- * 9 - Port Reset
- * 8 - Low Speed Device Attached
- * 5:4 - Line Status
- * 3 - Port Enable/Disable Change - Used for detecting device removal
- * 2 - Port Enable/Disable
- * 1 - Connect Status Change
- * 0 - Current Connect Status
- */
- PORTSC1 = 0x10,
- /**
- * \brief Port Status and Controll Register (Port 2)
- *
- * See ::PORTSC1
- */
- PORTSC2 = 0x12
-};
-
-#endif
+++ /dev/null
-/*
- * Acess 2 USB Stack
- * USB Packet Control
- */
-#define DEBUG 1
-#include <acess.h>
-#include <vfs.h>
-#include <drv_pci.h>
-#include "usb.h"
-
-
-// === CODE ===
-void USB_MakeToken(void *Buf, int PID, int Addr, int EndP)
-{
- Uint8 *tok = Buf;
- int crc = 0; //USB_TokenCRC();
-
- tok[0] = PID & 0xFF;
- tok[1] = (Addr & 0x7F) | ((EndP&1)<<7);
- tok[2] = ((EndP >> 1) & 0x7) | crc;
-}
-
-#if 0
-void USB_SendPacket(int Controller, int PID, int Dev, int Endpoint, void *Data, int Length)
-{
- uint8_t buf[Length/*+??*/];
- switch(Controller & 0xF00)
- {
- case 1:
- UHCI_SendPacket(Controller & 0xFF);
- }
-}
-#endif
+++ /dev/null
-/*
- * AcessOS Version 1
- * USB Stack
- */
-#ifndef _USB_H_
-#define _USB_H_
-
-// === TYPES ===
-typedef struct sUSBHost tUSBHost;
-typedef struct sUSBDevice tUSBDevice;
-
-// === CONSTANTS ===
-enum eUSB_PIDs
-{
- /**
- * \name Token
- * \{
- */
- PID_OUT = 0xE1,
- PID_IN = 0x69,
- PID_SOF = 0xA5,
- PID_SETUP = 0x2D,
- /**
- * \}
- */
-
- /**
- * \name Data
- * \{
- */
- PID_DATA0 = 0xC3,
- PID_DATA1 = 0x4B,
- PID_DATA2 = 0x87, // USB2 only
- PID_MDATA = 0x0F, // USB2 only
- /**
- * \}
- */
-
- /**
- * \name Handshake
- * \{
- */
- PID_ACK = 0xD2,
- PID_NAK = 0x5A,
- PID_STALL = 0x1E,
- PID_NYET = 0x96,
- /**
- * \}
- */
-
- /**
- * \name Special
- * \{
- */
- PID_PRE = 0x3C, PID_ERR = 0x3C,
- PID_SPLIT = 0x78,
- PID_PING = 0xB4,
- PID_RESVD = 0xF0,
- /**
- * \}
- */
-};
-
-// === FUNCTIONS ===
-/**
- * \note 00101 - X^5+X^2+1
- */
-Uint8 USB_TokenCRC(void *Data, int len);
-/**
- * \note X^16 + X15 + X^2 + 1
- */
-Uint16 USB_DataCRC(void *Data, int len);
-
-// === STRUCTURES ===
-/**
- * \brief Defines a USB Host Controller
- */
-struct sUSBHost
-{
- Uint16 IOBase;
-
- int (*SendPacket)(int ID, int Length, void *Data);
-};
-
-/**
- * \brief Defines a single device on the USB Bus
- */
-struct sUSBDevice
-{
- tUSBHost *Host;
-};
-
-#endif
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