{\r
for( fcn = 0; fcn < 8; fcn++ ) // Max 8 functions per device\r
{\r
+ Debug("%i:%i:%i", BusID, dev, fcn);\r
// Check if the device/function exists\r
if(!PCI_EnumDevice(BusID, dev, fcn, &devInfo))\r
continue;\r
addr = 0x80000000 | ((Uint)bus<<16) | ((Uint)slot<<11) | ((Uint)fcn<<8);\r
for(i=0;i<256/4;i++)\r
{\r
- #if 1\r
+ #if 0\r
outd(0xCF8, addr);\r
info->ConfigCache[i] = ind(0xCFC);\r
addr += 4;\r
offset &= 0xFF; // 8 Bits\r
\r
address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC);\r
- Debug("PCI_CfgReadDWord: address = %x", address);\r
outd(0xCF8, address);\r
\r
data = ind(0xCFC);\r
+ //Debug("PCI(0x%x) = 0x%08x", address, data);\r
return data;\r
}\r
void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data)\r
}\r
Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
- Uint32 data;\r
+ Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset);\r
\r
- bus &= 0xFF; // 8 Bits\r
- dev &= 0x1F; // 5 Bits\r
- func &= 0x7; // 3 Bits\r
- offset &= 0xFF; // 8 Bits\r
+ data >>= (offset&2)*8; // Allow Access to Upper Word\r
\r
- //LogF("PCI_CfgReadWord: (bus=0x%x,dev=0x%x,func=%x,offset=0x%x)\n", bus, dev, func, offset);\r
- \r
- outd(0xCF8,\r
- 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC) );\r
- \r
- data = ind(0xCFC);\r
- data >>= (offset&2)*8; //Allow Access to Upper Word\r
- //LogF("PCI_CfgReadWord: RETURN 0x%x\n", data&0xFFFF);\r
return (Uint16)data;\r
}\r
\r
Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset)\r
{\r
- Uint32 address;\r
- Uint32 data;\r
- \r
- bus &= 0xFF; // 8 Bits\r
- dev &= 0x1F; // 4 Bits\r
- func &= 0x7; // 3 Bits\r
- offset &= 0xFF; // 8 Bits\r
+ Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset);\r
\r
- address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC);\r
- outd(0xCF8, address);\r
- \r
- data = ind(0xCFC);\r
data >>= (offset&3)*8; //Allow Access to Upper Word\r
return (Uint8)data;\r
}\r