// TODO: The same
}
- if( EHCI_InitController(addr, irq) ) {
+ Log_Log("ECHI", "Controller at PCI %i 0x%x IRQ 0x%x",
+ id, addr, irq);
+
+ if( EHCI_InitController(addr, irq) )
+ {
// TODO: Detect other forms of failure than "out of slots"
break ;
}
+
+ // TODO: Register with the USB stack
}
return 0;
}
}
if(!cont) {
+ Log_Notice("EHCI", "Too many controllers (EHCI_MAX_CONTROLLERS=%i)", EHCI_MAX_CONTROLLERS);
return 1;
}
// Clear interrupts
cont->OpRegs->USBSts = sts;
+ if( sts & 0xFFFF0FC0 ) {
+ LOG("Oops, reserved bits set (%08x), funny hardware?", sts);
+ sts &= ~0xFFFF0FFC0;
+ }
+
+ // Unmask read-only bits
+ sts &= ~(0xF000);
+
if( sts & USBINTR_IOC ) {
// IOC
sts &= ~USBINTR_IOC;
if( sts & USBINTR_PortChange ) {
// Port change, determine what port and poke helper thread
+ LOG("Port status change");
sts &= ~USBINTR_PortChange;
}
if( sts & USBINTR_FrameRollover ) {
// Frame rollover, used to aid timing (trigger per-second operations)
+ LOG("Frame rollover");
sts &= ~USBINTR_FrameRollover;
}
if( sts ) {
// Unhandled interupt bits
// TODO: Warn
+ LOG("WARN - Bitmask %x unhandled", sts);
}
+
+
}
// --------------------------------------------------------------------
* 15 = Asynchronous Schedule Status
* 16:31 = Reserved ?(Zero)
*/
- Uint32 USBSts;
+ volatile Uint32 USBSts;
/**
* USB Interrupt Enable Register
*
*
* Bits 14:3 are used as n index into PeridocListBase
*/
- Uint32 FrIndex;
+ volatile Uint32 FrIndex;
/**
* Control Data Structure Segment Register
*