--- /dev/null
+/**\r
+ * \file drv_bochsvbe.c\r
+ * \brief BGA (Bochs Graphic Adapter) Driver\r
+ * \note for Acess2\r
+ * \warning This driver does NOT support the Bochs PCI VGA driver\r
+*/\r
+#define DEBUG 0\r
+#include <common.h>\r
+#include <errno.h>\r
+#include <modules.h>\r
+#include <vfs.h>\r
+#include <fs_devfs.h>\r
+#include <drv_pci.h>\r
+#include <tpl_drv_video.h>\r
+\r
+//#define INT static\r
+#define INT\r
+\r
+// === TYPEDEFS ===\r
+typedef struct {\r
+ Uint16 width;\r
+ Uint16 height;\r
+ Uint16 bpp;\r
+ Uint16 flags;\r
+ Uint32 fbSize;\r
+} t_bga_mode;\r
+\r
+// === CONSTANTS ===\r
+enum eMode_Flags {\r
+ MODEFLAG_TEXT = 1\r
+};\r
+#define BGA_LFB_MAXSIZE (1024*768*4)\r
+#define VBE_DISPI_BANK_ADDRESS 0xA0000\r
+#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000\r
+#define VBE_DISPI_IOPORT_INDEX 0x01CE\r
+#define VBE_DISPI_IOPORT_DATA 0x01CF\r
+#define VBE_DISPI_DISABLED 0x00\r
+#define VBE_DISPI_ENABLED 0x01\r
+#define VBE_DISPI_LFB_ENABLED 0x40\r
+#define VBE_DISPI_NOCLEARMEM 0x80\r
+enum {\r
+ VBE_DISPI_INDEX_ID,\r
+ VBE_DISPI_INDEX_XRES,\r
+ VBE_DISPI_INDEX_YRES,\r
+ VBE_DISPI_INDEX_BPP,\r
+ VBE_DISPI_INDEX_ENABLE,\r
+ VBE_DISPI_INDEX_BANK,\r
+ VBE_DISPI_INDEX_VIRT_WIDTH,\r
+ VBE_DISPI_INDEX_VIRT_HEIGHT,\r
+ VBE_DISPI_INDEX_X_OFFSET,\r
+ VBE_DISPI_INDEX_Y_OFFSET\r
+};\r
+\r
+\r
+// === PROTOTYPES ===\r
+// Driver\r
+ int BGA_Install(char **Arguments);\r
+void BGA_Uninstall();\r
+// Internal\r
+void BGA_int_WriteRegister(Uint16 reg, Uint16 value);\r
+Uint16 BGA_int_ReadRegister(Uint16 reg);\r
+void BGA_int_SetBank(Uint16 bank);\r
+void BGA_int_SetMode(Uint16 width, Uint16 height);\r
+ int BGA_int_UpdateMode(int id);\r
+ int BGA_int_FindMode(tVideo_IOCtl_Mode *info);\r
+ int BGA_int_ModeInfo(tVideo_IOCtl_Mode *info);\r
+ int BGA_int_MapFB(void *Dest);\r
+// Filesystem\r
+Uint64 BGA_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer);\r
+Uint64 BGA_Write(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer);\r
+ int BGA_Ioctl(tVFS_Node *node, int id, void *data);\r
+\r
+// === GLOBALS ===\r
+MODULE_DEFINE(0, 0x0032, BochsVBE, BGA_Install, NULL, NULL);\r
+tDevFS_Driver gBGA_DriverStruct = {\r
+ NULL, "BochsGA",\r
+ {\r
+ .Read = BGA_Read,\r
+ .Write = BGA_Write,\r
+ .IOCtl = BGA_Ioctl\r
+ }\r
+};\r
+ int giBGA_CurrentMode = -1;\r
+ int giBGA_DriverId = -1;\r
+Uint *gBGA_Framebuffer;\r
+t_bga_mode gBGA_Modes[] = {\r
+ {},\r
+ { 80,25, 32, MODEFLAG_TEXT, 80*25*8}, // 640 x 480\r
+ {100,37, 32, MODEFLAG_TEXT, 100*37*8}, // 800 x 600\r
+ {640,480,8, 0, 640*480},\r
+ {640,480,32, 0, 640*480*4},\r
+ {800,600,8, 0, 800*600},\r
+ {800,600,32, 0, 800*600*4},\r
+};\r
+#define BGA_MODE_COUNT (sizeof(gBGA_Modes)/sizeof(gBGA_Modes[0]))\r
+\r
+// === CODE ===\r
+/**\r
+ * \fn int BGA_Install(char **Arguments)\r
+ */\r
+int BGA_Install(char **Arguments)\r
+{\r
+ int bga_version = 0;\r
+ \r
+ // Check BGA Version\r
+ bga_version = BGA_int_ReadRegister(VBE_DISPI_INDEX_ID);\r
+ // NOTE: This driver was written for 0xB0C4, but they seem to be backwards compatable\r
+ if(bga_version < 0xB0C4 || bga_version > 0xB0C5) {\r
+ Warning("[BGA ] Bochs Adapter Version is not 0xB0C4 or 0xB0C5, instead 0x%x", bga_version);\r
+ return 0;\r
+ }\r
+ \r
+ // Install Device\r
+ giBGA_DriverId = DevFS_AddDevice( &gBGA_DriverStruct );\r
+ if(giBGA_DriverId == -1) {\r
+ Warning("[BGA ] Unable to register with DevFS, maybe already loaded?");\r
+ return 0;\r
+ }\r
+ \r
+ // Map Framebuffer to hardware address\r
+ gBGA_Framebuffer = (void *) MM_MapHWPage(VBE_DISPI_LFB_PHYSICAL_ADDRESS, 768); // 768 pages (3Mb)\r
+ \r
+ return 1;\r
+}\r
+\r
+/**\r
+ * \fn void BGA_Uninstall()\r
+ */\r
+void BGA_Uninstall()\r
+{\r
+ //DevFS_DelDevice( giBGA_DriverId );\r
+ MM_UnmapHWPage( VBE_DISPI_LFB_PHYSICAL_ADDRESS, 768 );\r
+}\r
+\r
+/**\r
+ * \fn Uint64 BGA_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer)\r
+ * \brief Read from the framebuffer\r
+ */\r
+Uint64 BGA_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer)\r
+{\r
+ // Check Mode\r
+ if(giBGA_CurrentMode == -1) return -1;\r
+ \r
+ // Check Offset and Length against Framebuffer Size\r
+ if(off+len > gBGA_Modes[giBGA_CurrentMode].fbSize)\r
+ return -1;\r
+ \r
+ // Copy from Framebuffer\r
+ memcpy(buffer, (void*)((Uint)gBGA_Framebuffer + (Uint)off), len);\r
+ return len;\r
+}\r
+\r
+/**\r
+ * \fn Uint64 BGA_Write(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer)\r
+ * \brief Write to the framebuffer\r
+ */\r
+Uint64 BGA_Write(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer)\r
+{ \r
+ ENTER("xoff xlen", off, len);\r
+ \r
+ // Check Mode\r
+ if(giBGA_CurrentMode == -1) {\r
+ LEAVE('i', -1);\r
+ return -1;\r
+ }\r
+ \r
+ // Check Input against Frambuffer Size\r
+ if(off+len > gBGA_Modes[giBGA_CurrentMode].fbSize) {\r
+ LEAVE('i', -1);\r
+ return -1;\r
+ }\r
+ \r
+ // Text Mode\r
+ if( gBGA_Modes[giBGA_CurrentMode].flags & MODEFLAG_TEXT )\r
+ {\r
+ tVT_Char *chars = buffer;\r
+ int pitch = gBGA_Modes[giBGA_CurrentMode].width * giVT_CharWidth;\r
+ Uint32 *dest;\r
+ dest = (void*)gBGA_Framebuffer;\r
+ dest += off * giVT_CharWidth;\r
+ len /= sizeof(tVT_Char);\r
+ while(len--)\r
+ {\r
+ VT_Font_Render(\r
+ chars->Ch,\r
+ dest, pitch,\r
+ VT_Colour12to24(chars->BGCol),\r
+ VT_Colour12to24(chars->FGCol)\r
+ );\r
+ dest += giVT_CharWidth;\r
+ chars++;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ Uint8 *destBuf = (Uint8*) ((Uint)gBGA_Framebuffer + (Uint)off);\r
+ \r
+ LOG("buffer = %p\n", buffer);\r
+ LOG("Updating Framebuffer (%p to %p)\n", \r
+ destBuf, destBuf + (Uint)len);\r
+ \r
+ \r
+ // Copy to Frambuffer\r
+ memcpy(destBuf, buffer, len);\r
+ \r
+ LOG("BGA Framebuffer updated\n");\r
+ }\r
+ \r
+ LEAVE('i', len);\r
+ return len;\r
+}\r
+\r
+/**\r
+ * \fn INT int BGA_Ioctl(tVFS_Node *node, int id, void *data)\r
+ * \brief Handle messages to the device\r
+ */\r
+INT int BGA_Ioctl(tVFS_Node *node, int id, void *data)\r
+{\r
+ int ret = -2;\r
+ ENTER("pNode iId pData", node, id, data);\r
+ \r
+ switch(id)\r
+ {\r
+ case DRV_IOCTL_TYPE:\r
+ ret = DRV_TYPE_VIDEO;\r
+ break;\r
+ case DRV_IOCTL_IDENT:\r
+ memcpy(data, "BGA1", 4);\r
+ ret = 1;\r
+ break;\r
+ case DRV_IOCTL_VERSION:\r
+ ret = 0x100;\r
+ break;\r
+ case DRV_IOCTL_LOOKUP: // TODO: Implement\r
+ ret = 0;\r
+ break;\r
+ \r
+ case VIDEO_IOCTL_SETMODE:\r
+ ret = BGA_int_UpdateMode(*(int*)(data));\r
+ break;\r
+ \r
+ case VIDEO_IOCTL_GETMODE:\r
+ ret = giBGA_CurrentMode;\r
+ break;\r
+ \r
+ case VIDEO_IOCTL_FINDMODE:\r
+ ret = BGA_int_FindMode((tVideo_IOCtl_Mode*)data);\r
+ break;\r
+ \r
+ case VIDEO_IOCTL_MODEINFO:\r
+ ret = BGA_int_ModeInfo((tVideo_IOCtl_Mode*)data);\r
+ break;\r
+ \r
+ // Request Access to LFB\r
+ case VIDEO_IOCTL_REQLFB:\r
+ ret = BGA_int_MapFB( *(void**)data );\r
+ break;\r
+ \r
+ default:\r
+ LEAVE('i', -2);\r
+ return -2;\r
+ }\r
+ \r
+ LEAVE('i', ret);\r
+ return ret;\r
+}\r
+\r
+//== Internal Functions ==\r
+/**\r
+ * \fn void BGA_int_WriteRegister(Uint16 reg, Uint16 value)\r
+ * \brief Writes to a BGA register\r
+ */\r
+void BGA_int_WriteRegister(Uint16 reg, Uint16 value)\r
+{\r
+ outw(VBE_DISPI_IOPORT_INDEX, reg);\r
+ outw(VBE_DISPI_IOPORT_DATA, value);\r
+}\r
+\r
+INT Uint16 BGA_int_ReadRegister(Uint16 reg)\r
+{\r
+ outw(VBE_DISPI_IOPORT_INDEX, reg);\r
+ return inw(VBE_DISPI_IOPORT_DATA);\r
+}\r
+\r
+#if 0\r
+INT void BGA_int_SetBank(Uint16 bank)\r
+{\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_BANK, bank);\r
+}\r
+#endif\r
+\r
+/**\r
+ * \fn void BGA_int_SetMode(Uint16 width, Uint16 height, Uint16 bpp)\r
+ * \brief Sets the video mode from the dimensions and bpp given\r
+ */\r
+void BGA_int_SetMode(Uint16 width, Uint16 height)\r
+{\r
+ ENTER("iwidth iheight ibpp", width, height, bpp);\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_DISABLED);\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_XRES, width);\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_YRES, height);\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_BPP, 32);\r
+ BGA_int_WriteRegister(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED | VBE_DISPI_NOCLEARMEM | VBE_DISPI_LFB_ENABLED);\r
+ //BGA_int_WriteRegister(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED | VBE_DISPI_NOCLEARMEM);\r
+ LEAVE('-');\r
+}\r
+\r
+/**\r
+ * \fn int BGA_int_UpdateMode(int id)\r
+ * \brief Set current vide mode given a mode id\r
+ */\r
+int BGA_int_UpdateMode(int id)\r
+{\r
+ // Sanity Check\r
+ if(id < 0 || id >= BGA_MODE_COUNT) return -1;\r
+ \r
+ // Check if it is a text mode\r
+ if( gBGA_Modes[id].flags & MODEFLAG_TEXT )\r
+ BGA_int_SetMode(\r
+ gBGA_Modes[id].width*giVT_CharWidth,\r
+ gBGA_Modes[id].height*giVT_CharHeight);\r
+ else // Graphics?\r
+ BGA_int_SetMode(\r
+ gBGA_Modes[id].width,\r
+ gBGA_Modes[id].height);\r
+ \r
+ giBGA_CurrentMode = id;\r
+ return id;\r
+}\r
+\r
+/**\r
+ * \fn int BGA_int_FindMode(tVideo_IOCtl_Mode *info)\r
+ * \brief Find a mode matching the given options\r
+ */\r
+int BGA_int_FindMode(tVideo_IOCtl_Mode *info)\r
+{\r
+ int i;\r
+ int best = 0, bestFactor = 1000;\r
+ int factor, tmp;\r
+ int rqdProduct = info->width * info->height * info->bpp;\r
+ \r
+ ENTER("pinfo", info);\r
+ LOG("info = {width:%i,height:%i,bpp:%i})\n", info->width, info->height, info->bpp);\r
+ \r
+ for(i = 0; i < BGA_MODE_COUNT; i++)\r
+ {\r
+ #if DEBUG >= 2\r
+ LogF("Mode %i (%ix%ix%i), ", i, gBGA_Modes[i].width, gBGA_Modes[i].height, gBGA_Modes[i].bpp);\r
+ #endif\r
+ \r
+ // Check if this mode is the same type as what we want\r
+ if( !(gBGA_Modes[i].flags & MODEFLAG_TEXT) != !(info->flags & VIDEO_FLAG_TEXT) )\r
+ continue;\r
+ \r
+ // Ooh! A perfect match\r
+ if(gBGA_Modes[i].width == info->width\r
+ && gBGA_Modes[i].height == info->height\r
+ && gBGA_Modes[i].bpp == info->bpp)\r
+ {\r
+ #if DEBUG >= 2\r
+ LogF("Perfect!\n");\r
+ #endif\r
+ best = i;\r
+ break;\r
+ }\r
+ \r
+ // If not, how close are we?\r
+ tmp = gBGA_Modes[i].width * gBGA_Modes[i].height * gBGA_Modes[i].bpp;\r
+ tmp -= rqdProduct;\r
+ tmp = tmp < 0 ? -tmp : tmp; // tmp = ABS(tmp)\r
+ factor = tmp * 100 / rqdProduct;\r
+ \r
+ #if DEBUG >= 2\r
+ LogF("factor = %i\n", factor);\r
+ #endif\r
+ \r
+ if(factor < bestFactor)\r
+ {\r
+ bestFactor = factor;\r
+ best = i;\r
+ }\r
+ }\r
+ \r
+ info->id = best;\r
+ info->width = gBGA_Modes[best].width;\r
+ info->height = gBGA_Modes[best].height;\r
+ info->bpp = gBGA_Modes[best].bpp;\r
+ \r
+ info->flags = 0;\r
+ if(gBGA_Modes[best].flags & MODEFLAG_TEXT)\r
+ info->flags |= VIDEO_FLAG_TEXT;\r
+ \r
+ return best;\r
+}\r
+\r
+/**\r
+ * \fn int BGA_int_ModeInfo(tVideo_IOCtl_Mode *info)\r
+ * \brief Get mode information\r
+ */\r
+int BGA_int_ModeInfo(tVideo_IOCtl_Mode *info)\r
+{\r
+ // Sanity Check\r
+ if( !MM_IsUser( (Uint)info, sizeof(tVideo_IOCtl_Mode) ) ) {\r
+ return -EINVAL;\r
+ }\r
+ \r
+ if(info->id < 0 || info->id >= BGA_MODE_COUNT) return -1;\r
+ \r
+ info->width = gBGA_Modes[info->id].width;\r
+ info->height = gBGA_Modes[info->id].height;\r
+ info->bpp = gBGA_Modes[info->id].bpp;\r
+ \r
+ info->flags = 0;\r
+ if(gBGA_Modes[info->id].flags & MODEFLAG_TEXT)\r
+ info->flags |= VIDEO_FLAG_TEXT;\r
+ \r
+ return 1;\r
+}\r
+\r
+/**\r
+ * \fn int BGA_int_MapFB(void *Dest)\r
+ * \brief Map the framebuffer into a process's space\r
+ * \param Dest User address to load to\r
+ */\r
+int BGA_int_MapFB(void *Dest)\r
+{\r
+ Uint i;\r
+ Uint pages;\r
+ \r
+ // Sanity Check\r
+ if((Uint)Dest > 0xC0000000) return 0;\r
+ if(gBGA_Modes[giBGA_CurrentMode].bpp < 15) return 0; // Only non-pallete modes are supported\r
+ \r
+ // Count required pages\r
+ pages = (gBGA_Modes[giBGA_CurrentMode].fbSize + 0xFFF) >> 12;\r
+ \r
+ // Check if there is space\r
+ for( i = 0; i < pages; i++ )\r
+ {\r
+ if(MM_GetPhysAddr( (Uint)Dest + (i << 12) ))\r
+ return 0;\r
+ }\r
+ \r
+ // Map\r
+ for( i = 0; i < pages; i++ )\r
+ MM_Map( (Uint)Dest + (i<<12), VBE_DISPI_LFB_PHYSICAL_ADDRESS + (i<<12) );\r
+ \r
+ return 1;\r
+}\r
--- /dev/null
+/* Acess2
+ * NE2000 Driver
+ *
+ * See: ~/Sources/bochs/bochs.../iodev/ne2k.cc
+ */
+#define DEBUG 1
+#include <common.h>
+#include <modules.h>
+#include <fs_devfs.h>
+#include <drv_pci.h>
+
+// === CONSTANTS ===
+#define MEM_START 0x40
+#define MEM_END 0xC0
+#define RX_FIRST (MEM_START)
+#define RX_LAST (MEM_START+RX_BUF_SIZE-1)
+#define RX_BUF_SIZE 0x40
+#define TX_FIRST (MEM_START+RX_BUF_SIZE)
+#define TX_LAST (MEM_END)
+#define TX_BUF_SIZE 0x40
+
+static const struct {
+ Uint16 Vendor;
+ Uint16 Device;
+} csaCOMPAT_DEVICES[] = {
+ {0x10EC, 0x8029}, // Realtek 8029
+ {0x10EC, 0x8129} // Realtek 8129
+};
+#define NUM_COMPAT_DEVICES (sizeof(csaCOMPAT_DEVICES)/sizeof(csaCOMPAT_DEVICES[0]))
+
+enum eNe2k_Page0Read {
+ CMD = 0, //!< the master command register
+ CLDA0, //!< Current Local DMA Address 0
+ CLDA1, //!< Current Local DMA Address 1
+ BNRY, //!< Boundary Pointer (for ringbuffer)
+ TSR, //!< Transmit Status Register
+ NCR, //!< collisions counter
+ FIFO, //!< (for what purpose ??)
+ ISR, //!< Interrupt Status Register
+ CRDA0, //!< Current Remote DMA Address 0
+ CRDA1, //!< Current Remote DMA Address 1
+ RSR = 0xC //!< Receive Status Register
+};
+
+enum eNe2k_Page0Write {
+ PSTART = 1, //!< page start (init only)
+ PSTOP, //!< page stop (init only)
+ TPSR = 4, //!< transmit page start address
+ TBCR0, //!< transmit byte count (low)
+ TBCR1, //!< transmit byte count (high)
+ RSAR0 = 8, //!< remote start address (lo)
+ RSAR1, //!< remote start address (hi)
+ RBCR0, //!< remote byte count (lo)
+ RBCR1, //!< remote byte count (hi)
+ RCR, //!< receive config register
+ TCR, //!< transmit config register
+ DCR, //!< data config register (init)
+ IMR //!< interrupt mask register (init)
+};
+
+// === TYPES ===
+typedef struct sNe2k_Card {
+ Uint16 IOBase; //!< IO Port Address from PCI
+ Uint8 IRQ; //!< IRQ Assigned from PCI
+
+ int NextMemPage; //!< Next Card Memory page to use
+
+ Uint8 Buffer[RX_BUF_SIZE];
+
+ char Name[2]; // "0"
+ tVFS_Node Node;
+ Uint8 MacAddr[6];
+} tCard;
+
+// === PROTOTYPES ===
+ int Ne2k_Install(char **Arguments);
+char *Ne2k_ReadDir(tVFS_Node *Node, int Pos);
+tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name);
+Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
+Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length);
+void Ne2k_IRQHandler(int IntNum);
+
+// === GLOBALS ===
+MODULE_DEFINE(0, 0x0032, Ne2k, Ne2k_Install, NULL, NULL);
+tDevFS_Driver gNe2k_DriverInfo = {
+ NULL, "ne2k",
+ {
+ .NumACLs = 1,
+ .ACLs = &gVFS_ACL_EveryoneRX,
+ .Flags = VFS_FFLAG_DIRECTORY,
+ .ReadDir = Ne2k_ReadDir,
+ .FindDir = Ne2k_FindDir
+ }
+};
+Uint16 gNe2k_BaseAddress;
+ int giNe2k_CardCount = 0;
+tCard *gpNe2k_Cards = NULL;
+
+// === CODE ===
+/**
+ * \fn int Ne2k_Install(char **Options)
+ * \brief Installs the NE2000 Driver
+ */
+int Ne2k_Install(char **Options)
+{
+ int i, j, k;
+ int count, id, base;
+
+ // --- Scan PCI Bus ---
+ // Count Cards
+ giNe2k_CardCount = 0;
+ for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
+ {
+ giNe2k_CardCount += PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
+ }
+
+ // Enumerate Cards
+ k = 0;
+ gpNe2k_Cards = malloc( giNe2k_CardCount * sizeof(tCard) );
+ memsetd(gpNe2k_Cards, 0, giNe2k_CardCount * sizeof(tCard) / 4);
+ for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
+ {
+ count = PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
+ for( j = 0; j < count; j ++,k ++ )
+ {
+ id = PCI_GetDevice( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0, j );
+ // Create Structure
+ base = PCI_AssignPort( id, 0, 0x20 );
+ gpNe2k_Cards[ k ].IOBase = base;
+ gpNe2k_Cards[ k ].IRQ = PCI_GetIRQ( id );
+ gpNe2k_Cards[ k ].NextMemPage = 64;
+
+ // Install IRQ Handler
+ IRQ_AddHandler(gpNe2k_Cards[ k ].IRQ, Ne2k_IRQHandler);
+
+ // Reset Card
+ outb( base + 0x1F, inb(base + 0x1F) );
+ while( (inb( base+ISR ) & 0x80) == 0 );
+ outb( base + ISR, 0x80 );
+
+ // Initialise Card
+ outb( base + CMD, 0x21 ); // No DMA and Stop
+ outb( base + DCR, 0x49 ); // Set WORD mode
+ outb( base + IMR, 0x00 );
+ outb( base + ISR, 0xFF );
+ outb( base + RCR, 0x20 ); // Reciever to Monitor
+ outb( base + TCR, 0x02 ); // Transmitter OFF (TCR.LB = 1, Internal Loopback)
+ outb( base + RBCR0, 6*4 ); // Remote Byte Count
+ outb( base + RBCR1, 0 );
+ outb( base + RSAR0, 0 ); // Clear Source Address
+ outb( base + RSAR1, 0 );
+ outb( base + CMD, 0x0A ); // Remote Read, Start
+
+ // Read MAC Address
+ gpNe2k_Cards[ k ].MacAddr[0] = inb(base+0x10); inb(base+0x10);
+ gpNe2k_Cards[ k ].MacAddr[1] = inb(base+0x10); inb(base+0x10);
+ gpNe2k_Cards[ k ].MacAddr[2] = inb(base+0x10); inb(base+0x10);
+ gpNe2k_Cards[ k ].MacAddr[3] = inb(base+0x10); inb(base+0x10);
+ gpNe2k_Cards[ k ].MacAddr[4] = inb(base+0x10); inb(base+0x10);
+ gpNe2k_Cards[ k ].MacAddr[5] = inb(base+0x10); inb(base+0x10);
+
+ outb( base+PSTART, RX_FIRST); // Set Receive Start
+ outb( base+BNRY, RX_LAST-1); // Set Boundary Page
+ outb( base+PSTOP, RX_LAST); // Set Stop Page
+ outb( base+ISR, 0xFF ); // Clear all ints
+ outb( base+CMD, 0x22 ); // No DMA, Start
+ outb( base+IMR, 0x3F ); // Set Interupt Mask
+ outb( base+RCR, 0x0F ); // Set WRAP and allow all packet matches
+ outb( base+TCR, 0x00 ); // Set Normal Transmitter mode
+ outb( base+TPSR, 0x40); // Set Transmit Start
+ // Set MAC Address
+ /*
+ Ne2k_WriteReg(base, MAC0, gpNe2k_Cards[ k ].MacAddr[0]);
+ Ne2k_WriteReg(base, MAC1, gpNe2k_Cards[ k ].MacAddr[1]);
+ Ne2k_WriteReg(base, MAC2, gpNe2k_Cards[ k ].MacAddr[2]);
+ Ne2k_WriteReg(base, MAC3, gpNe2k_Cards[ k ].MacAddr[3]);
+ Ne2k_WriteReg(base, MAC4, gpNe2k_Cards[ k ].MacAddr[4]);
+ Ne2k_WriteReg(base, MAC5, gpNe2k_Cards[ k ].MacAddr[5]);
+ */
+
+ Log("[NE2K]: Card #%i: IRQ=%i, IOBase=0x%x",
+ k, gpNe2k_Cards[ k ].IRQ, gpNe2k_Cards[ k ].IOBase);
+ Log("MAC Address %x:%x:%x:%x:%x:%x",
+ gpNe2k_Cards[ k ].MacAddr[0], gpNe2k_Cards[ k ].MacAddr[1],
+ gpNe2k_Cards[ k ].MacAddr[2], gpNe2k_Cards[ k ].MacAddr[3],
+ gpNe2k_Cards[ k ].MacAddr[4], gpNe2k_Cards[ k ].MacAddr[5]
+ );
+
+ // Set VFS Node
+ gpNe2k_Cards[ k ].Name[0] = '0'+k;
+ gpNe2k_Cards[ k ].Name[1] = '\0';
+ gpNe2k_Cards[ k ].Node.ImplPtr = &gpNe2k_Cards[ k ];
+ gpNe2k_Cards[ k ].Node.NumACLs = 0; // Root Only
+ gpNe2k_Cards[ k ].Node.CTime = now();
+ gpNe2k_Cards[ k ].Node.Write = Ne2k_Write;
+ }
+ }
+
+ gNe2k_DriverInfo.RootNode.Size = giNe2k_CardCount;
+ DevFS_AddDevice( &gNe2k_DriverInfo );
+ return 0;
+}
+
+/**
+ * \fn char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
+ */
+char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
+{
+ char ret[2];
+ if(Pos < 0 || Pos >= giNe2k_CardCount) return NULL;
+ ret[0] = '0'+Pos;
+ ret[1] = '\0';
+ return strdup(ret);
+}
+
+/**
+ * \fn tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
+ */
+tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
+{
+ if(Name[0] == '\0' || Name[1] != '\0') return NULL;
+
+ return &gpNe2k_Cards[ Name[0]-'0' ].Node;
+}
+
+/**
+ * \fn Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
+ */
+Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
+{
+ tCard *Card = (tCard*)Node->ImplPtr;
+ Uint16 *buf = Buffer;
+ int rem = Length;
+
+ ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
+
+ // Sanity Check Length
+ if(Length > TX_BUF_SIZE) {
+ LEAVE('i', 0);
+ return 0;
+ }
+
+ // Make sure that the card is in page 0
+ outb(Card->IOBase + CMD, 0|0x22); // Page 0, Start, NoDMA
+
+ // Clear Remote DMA Flag
+ outb(Card->IOBase + ISR, 0x40); // Bit 6
+
+ // Send Size - Remote Byte Count Register
+ outb(Card->IOBase + TBCR0, Length & 0xFF);
+ outb(Card->IOBase + TBCR1, Length >> 8);
+
+ // Send Size - Remote Byte Count Register
+ outb(Card->IOBase + RBCR0, Length & 0xFF);
+ outb(Card->IOBase + RBCR1, Length >> 8);
+
+ // Set up transfer
+ outb(Card->IOBase + RSAR0, 0x00); // Page Offset
+ outb(Card->IOBase + RSAR1, Ne2k_int_GetWritePage(Card, Length)); // Page Offset
+ // Start
+ //outb(Card->IOBase + CMD, 0|0x18|0x4|0x2); // Page 0, Transmit Packet, TXP, Start
+ outb(Card->IOBase + CMD, 0|0x10|0x2); // Page 0, Remote Write, Start
+
+ // Send Data
+ for(rem = Length; rem; rem -= 2)
+ outw(Card->IOBase + 0x10, *buf++);
+
+ while( inb(Card->IOBase + ISR) == 0) // Wait for Remote DMA Complete
+ ; //Proc_Yield();
+
+ outb( Card->IOBase + ISR, 0x40 ); // ACK Interrupt
+
+ // Send Packet
+ outb(Card->IOBase + CMD, 0|0x10|0x4|0x2);
+
+ // Complete DMA
+ //outb(Card->IOBase + CMD, 0|0x20);
+
+ LEAVE('i', Length);
+ return Length;
+}
+
+/**
+ * \fn Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
+ */
+Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
+{
+ Uint8 ret = Card->NextMemPage;
+
+ Card->NextMemPage += (Length + 0xFF) >> 8;
+ if(Card->NextMemPage >= TX_LAST) {
+ Card->NextMemPage -= TX_BUF_SIZE;
+ }
+
+ return ret;
+}
+
+/**
+ * \fn void Ne2k_IRQHandler(int IntNum)
+ */
+void Ne2k_IRQHandler(int IntNum)
+{
+ int i;
+ for( i = 0; i < giNe2k_CardCount; i++ )
+ {
+ if(gpNe2k_Cards[i].IRQ == IntNum) {
+ LOG("Clearing interrupts on card %i (0x%x)\n", i, inb( gpNe2k_Cards[i].IOBase + ISR ));
+ outb( gpNe2k_Cards[i].IOBase + ISR, 0xFF ); // Reset All
+ return ;
+ }
+ }
+ Warning("[NE2K ] Recieved Unknown IRQ %i", IntNum);
+}
git.ucc.asn.au / tpg / acess2.git / commitdiff
UCC git Repository :: git.ucc.asn.au