Kernel/arm7 - Updated ARM7 code to newer HAL API changes

diff --git a/Kernel/Makefile b/Kernel/Makefile
index dacafdb..6e706ae 100644 (file)
--- a/Kernel/Makefile
+++ b/Kernel/Makefile
@@ -83,7 +83,6 @@ $(BIN): $(OBJ) $(MODS) arch/$(ARCHDIR)/link.ld Makefile
        @wc -l $(SRCFILES) include/*.h > LineCounts.$(ARCH).txt
        @echo BUILD_NUM = $$(( $(BUILD_NUM) + 1 )) > Makefile.BuildNum.$(ARCH)
        $(POSTBUILD)
-#      $(STRIP) $(BIN)
 
 $(OBJDIR)%.ao$(OBJSUFFIX): %.$(AS_SUFFIX) Makefile
        @echo --- AS -o $@

diff --git a/Kernel/arch/arm7/include/arch.h b/Kernel/arch/arm7/include/arch.h
index d4f8156..36c1a3f 100644 (file)
--- a/Kernel/arch/arm7/include/arch.h
+++ b/Kernel/arch/arm7/include/arch.h
@@ -9,6 +9,7 @@
 #define INVLPTR        ((void*)-1)
 #define BITS   32
 #define PAGE_SIZE      0x1000
+#define KERNEL_BASE    0x80000000      // 2GiB
 
 // === TYPES ===
 typedef unsigned int   Uint;

diff --git a/Kernel/arch/arm7/include/lock.h b/Kernel/arch/arm7/include/lock.h
index dbcac93..5a67086 100644 (file)
--- a/Kernel/arch/arm7/include/lock.h
+++ b/Kernel/arch/arm7/include/lock.h
@@ -26,31 +26,18 @@ static inline int CPU_HAS_LOCK(struct sShortSpinlock *Lock)
 
 static inline int SHORTLOCK(struct sShortSpinlock *Lock)
 {
-       #if 0
-       while( __sync_lock_test_and_set( &Lock->Lock, 1 ) == 1 );
-       #elif 0
-       while( Lock->Lock )     ;
-       Lock->Lock = 1;
-       #elif 1
-        int    v = 1;
-       while( v )
-       {
-               __asm__ __volatile__ ("swp [%0], %1" : "=r" (v) : "r" (&lock));
-       }
-       #elif 0
-       // Shamelessly copied from linux (/arch/arm/include/asm/spinlock.h) until I can fix stuff
+       // Coped from linux, yes, but I know what it does now :)
        Uint    tmp;
        __asm__ __volatile__ (
-       "1:     ldrex   %0, [%1]\n"
-       "       teq     %0, #0\n"
-       "       strexeq %0, %2, [%1]\n" // Magic? TODO: Look up
-       "       teqeq   %0, #0\n"
-       "       bne     1b"
+       "1:     ldrex   %0, [%1]\n"     // Exclusive LOAD
+       "       teq     %0, #0\n"       // Check if zero
+       "       strexeq %0, %2, [%1]\n" // Set to one if it is zero (releasing lock on the memory)
+       "       teqeq   %0, #0\n"       // If the lock was avaliable, check if the write succeeded
+       "       bne     1b"     // If the lock was unavaliable, or the write failed, loop
                : "=&r" (tmp)   // Temp
                : "r" (&Lock->Lock), "r" (1)
                : "cc"  // Condition codes clobbered
                );
-       #endif
        return 1;
 }
 

diff --git a/Kernel/arch/arm7/include/mm_virt.h b/Kernel/arch/arm7/include/mm_virt.h
index bbbe4ce..b57e45c 100644 (file)
--- a/Kernel/arch/arm7/include/mm_virt.h
+++ b/Kernel/arch/arm7/include/mm_virt.h
@@ -18,7 +18,7 @@
 // First level table is aligned to 16KiB (restriction of TTBR reg)
 // - VMSAv6 uses two TTBR regs, determined by bit 31
 
-#define KERNEL_BASE    0x80000000      // 2GiB
+//#define KERNEL_BASE  0x80000000      // 2GiB
 
 #define MM_KHEAP_BASE  0x80800000      // 8MiB of kernel code
 #define MM_KHEAP_MAX   0xC0000000      // ~1GiB of kernel heap

diff --git a/Kernel/arch/arm7/mm_virt.c b/Kernel/arch/arm7/mm_virt.c
index 4d453f4..7b11237 100644 (file)
--- a/Kernel/arch/arm7/mm_virt.c
+++ b/Kernel/arch/arm7/mm_virt.c
@@ -345,3 +345,8 @@ void MM_FreeTemp(tVAddr VAddr)
        // TODO: Implement FreeTemp
 }
 
+void MM_DumpTables(tVAddr Start, tVAddr End)
+{
+       
+}
+

diff --git a/Kernel/include/tpl_mm_phys_bitmap.h b/Kernel/include/tpl_mm_phys_bitmap.h
index 76a3810..19ef509 100644 (file)
--- a/Kernel/include/tpl_mm_phys_bitmap.h
+++ b/Kernel/include/tpl_mm_phys_bitmap.h
@@ -307,6 +307,20 @@ void MM_RefPhys(tPAddr PAddr)
        }
 }
 
+int MM_GetRefCount(tPAddr PAddr)
+{
+       PAddr >>= 12;
+       if( MM_GetPhysAddr( (tVAddr)&gaiPageReferences[PAddr] ) ) {
+               return gaiPageReferences[PAddr];
+       }
+       
+       if( gaPageBitmaps[ PAddr / 32 ] & (1LL << (PAddr&31)) ) {
+               return 1;
+       }
+       
+       return 0;
+}
+
 /**
  * \brief Dereference a physical page
  */
@@ -353,3 +367,34 @@ void MM_DerefPhys(tPAddr PAddr)
        #endif
 }
 
+int MM_SetPageNode(tPAddr PAddr, void *Node)
+{
+       tPAddr  page = PAddr >> 12;
+       tVAddr  node_page = ((tVAddr)&gapPageNodes[page]) & ~(PAGE_SIZE-1);
+
+       if( !MM_GetRefCount(PAddr) )    return 1;
+       
+       if( !MM_GetPhysAddr(node_page) ) {
+               if( !MM_Allocate(node_page) )
+                       return -1;
+               memset( (void*)node_page, 0, PAGE_SIZE );
+       }
+
+       gapPageNodes[page] = Node;
+       return 0;
+}
+
+int MM_GetPageNode(tPAddr PAddr, void **Node)
+{
+       PAddr >>= 12;
+       if( !MM_GetRefCount(PAddr) )    return 1;
+       
+       if( !MM_GetPhysAddr( (tVAddr)&gapPageNodes[PAddr] ) ) {
+               *Node = NULL;
+               return 0;
+       }
+
+       *Node = gapPageNodes[PAddr];
+       return 0;
+}
+

diff --git a/Makefile.arm7.cfg b/Makefile.arm7.cfg
index c3682b5..c1b454e 100644 (file)
--- a/Makefile.arm7.cfg
+++ b/Makefile.arm7.cfg
@@ -5,3 +5,4 @@ LD = arm-elf-ld
 OBJDUMP = arm-elf-objdump
 DISASM = $(OBJDUMP) -d -S
 ARCHDIR = arm7
+STRIP = arm-elf-strip