%macro DEF_IRQ 1
[global _Isr%1]
_Isr%1:
+ ;cli ; HACK!
push 0
push %1
jmp IRQCommon
gIRQ_Handlers[Regs->int_num][i](Regs->int_num);
}
+ //Log(" IRQ_Handler: Resetting");
if(Regs->int_num >= 8)
outb(0xA0, 0x20); // ACK IRQ (Secondary PIC)
outb(0x20, 0x20); // ACK IRQ
+ //Log("IRQ_Handler: RETURN");
}
/**
/**
* \fn void *memset(void *Dest, int Val, Uint Num)
- * \brief Do a byte set of Dest
+ * \brief Do a byte granuality set of Dest
*/
void *memset(void *Dest, int Val, Uint Num)
{
- __asm__ __volatile__ ("rep stosb" :: "D" (Dest), "a" (Val), "c" (Num));
+ __asm__ __volatile__ (
+ "rep stosl;\n\t"
+ "mov %3, %%ecx;\n\t"
+ "rep stosb"
+ :: "D" (Dest), "a" (Val), "c" (Num/4), "r" (Num&3));
return Dest;
}
/**
*/
void *memcpy(void *Dest, void *Src, Uint Num)
{
- __asm__ __volatile__ ("rep movsb" :: "D" (Dest), "S" (Src), "c" (Num));
+ if((Uint)Dest & 3 || (Uint)Src & 3)
+ __asm__ __volatile__ ("rep movsb" :: "D" (Dest), "S" (Src), "c" (Num));
+ else {
+ __asm__ __volatile__ (
+ "rep movsl;\n\t"
+ "mov %3, %%ecx;\n\t"
+ "rep movsb"
+ :: "D" (Dest), "S" (Src), "c" (Num/4), "r" (Num&3));
+ }
return Dest;
}
/**
if(Den == 32) return Num >> 5; // Speed Hacks
if(Den == 1024) return Num >> 10; // Speed Hacks
if(Den == 2048) return Num >> 11; // Speed Hacks
+ if(Den == 4096) return Num >> 12;
if(Num >> 32 == 0 && Den >> 32 == 0)
return (Uint32)Num / (Uint32)Den;
if(Den == 32) return Num & 31; // Speed Hacks
if(Den == 1024) return Num & 1023; // Speed Hacks
if(Den == 2048) return Num & 2047; // Speed Hacks
+ if(Den == 4096) return Num & 4095; // Speed Hacks
if(Num >> 32 == 0 && Den >> 32 == 0)
return (Uint32)Num % (Uint32)Den;
// === MACROS ===
#define NUM_TIMERS 8
#define TIMER_QUANTUM 100
-#define TIMER_FREQ 1024 //Hz
+#define TIMER_RATE 13 // (Max: 15, Min: 2) - 15 = 1Hz, 13 = 4Hz, 10 = 1024Hz
+#define TIMER_FREQ (32768>>TIMER_RATE) //Hz
#define MS_PER_TICK_WHOLE (1000/(TIMER_FREQ))
#define MS_PER_TICK_FRACT ((Uint64)(1000*TIMER_FREQ-((Uint64)MS_PER_TICK_WHOLE)*0x80000000/TIMER_FREQ))
outb(0x70, inb(0x70)&0x7F); // Disable NMIs
__asm__ __volatile__ ("cli"); // Disable normal interrupts
+ // Set IRQ8 firing rate
+ outb(0x70, 0x0A); // Set the index to register A
+ val = inb(0x71); // Get the current value of register A
+ outb(0x70, 0x0A); // Reset index to A
+ val &= 0xF0;
+ val |= TIMER_RATE;
+ outb(0x71, val); // Update the timer rate
+
// Enable IRQ8
outb(0x70, 0x0B); // Set the index to register B
val = inb(0x71); // Read the current value of register B
Uint offset;
Uint done = 0;
- // Pass straight on to ATA_ReadDMAPage if we can
+ // Pass straight on to ATA_WriteDMA if we can
if(Count <= MAX_DMA_SECTORS)
{
ret = ATA_WriteDMA(Disk, Address, Count, Buffer);
}
/**
- * \fn int ATA_ReadDMAPage(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
+ * \fn int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
*/
int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
{
return 0;
}
+ // Make sure that the card is in page 0
outb(Card->IOBase + CMD, 0|0x22); // Page 0, Start, NoDMA
- // Send Size - Transmit Byte Count Register
+
+ // Clear Remote DMA Flag
+ outb(Card->IOBase + ISR, 0x40); // Bit 6
+
+ // Send Size - Remote Byte Count Register
outb(Card->IOBase + TBCR0, Length & 0xFF);
outb(Card->IOBase + TBCR1, Length >> 8);
+
// Send Size - Remote Byte Count Register
outb(Card->IOBase + RBCR0, Length & 0xFF);
outb(Card->IOBase + RBCR1, Length >> 8);
- // Clear Remote DMA Flag
- outb(Card->IOBase + ISR, 0x40); // Bit 6
+
// Set up transfer
outb(Card->IOBase + RSAR0, 0x00); // Page Offset
outb(Card->IOBase + RSAR1, Ne2k_int_GetWritePage(Card, Length)); // Page Offset
// Start
- outb(Card->IOBase + CMD, 0|0x18|0x4|0x2); // Page 0, Transmit Packet, TXP, Start
+ //outb(Card->IOBase + CMD, 0|0x18|0x4|0x2); // Page 0, Transmit Packet, TXP, Start
+ outb(Card->IOBase + CMD, 0|0x10|0x2); // Page 0, Remote Write, Start
// Send Data
for(rem = Length; rem; rem -= 2)
outw(Card->IOBase + 0x10, *buf++);
+ while( inb(Card->IOBase + ISR) == 0) // Wait for Remote DMA Complete
+ ; //Proc_Yield();
+
+ outb( Card->IOBase + ISR, 0x40 ); // ACK Interrupt
+
+ // Send Packet
+ outb(Card->IOBase + CMD, 0|0x10|0x4|0x2);
+
// Complete DMA
- outb(Card->IOBase + CMD, 0|0x20);
+ //outb(Card->IOBase + CMD, 0|0x20);
LEAVE('i', Length);
return Length;
*/
void Ne2k_IRQHandler(int IntNum)
{
+ int i;
+ for( i = 0; i < giNe2k_CardCount; i++ )
+ {
+ if(gpNe2k_Cards[i].IRQ == IntNum) {
+ LOG("Clearing interrupts on card %i (0x%x)\n", i, inb( gpNe2k_Cards[i].IOBase + ISR ));
+ outb( gpNe2k_Cards[i].IOBase + ISR, 0xFF ); // Reset All
+ return ;
+ }
+ }
+ Warning("[NE2K ] Recieved Unknown IRQ %i", IntNum);
}
// Regular File\r
case EXT2_S_IFREG:\r
retNode.Flags = 0;\r
+ retNode.Size |= (Uint64)inode.i_dir_acl << 32;\r
break;\r
// Directory\r
case EXT2_S_IFDIR:\r
Uint32 i_block[15]; //!< Pointers to blocks\r
Uint32 i_version; //!< File version (for NFS)\r
Uint32 i_file_acl; //!< File ACL\r
- Uint32 i_dir_acl; //!< Directory ACL\r
+ Uint32 i_dir_acl; //!< Directory ACL / Extended File Size\r
Uint32 i_faddr; //!< Fragment address\r
union {\r
struct {\r