#define AP_KRO_ONLY 0x5
#define AP_RW_BOTH 0x3
#define AP_RO_BOTH 0x6
+#define PADDR_MASK_LVL1 0xFFFFFC00
// === IMPORTS ===
extern Uint32 kernel_table0[];
//#define FRACTAL(table1, addr) ((table1)[ (0xFF8/4*1024) + ((addr)>>20)])
#define FRACTAL(table1, addr) ((table1)[ (0xFF8/4*1024) + ((addr)>>22)])
+#define USRFRACTAL(table1, addr) ((table1)[ (0x7F8/4*1024) + ((addr)>>22)])
#define TLBIALL() __asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 0" : : "r" (0))
// === PROTOTYPES ===
int MM_int_AllocateCoarse(tVAddr VAddr, int Domain);
int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi);
int MM_int_GetPageInfo(tVAddr VAddr, tMM_PageInfo *pi);
+tPAddr MM_AllocateRootTable(void);
+void MM_int_CloneTable(Uint32 *DestEnt, int Table);
+tPAddr MM_Clone(void);
tVAddr MM_NewKStack(int bGlobal);
+void MM_int_DumpTableEnt(tVAddr Start, size_t Len, tMM_PageInfo *Info);
+//void MM_DumpTables(tVAddr Start, tVAddr End);
// === GLOBALS ===
{
Uint32 *table0, *table1;
Uint32 desc;
+
+// LogF("MM_int_GetPageInfo: VAddr=%p, pi=%p\n", VAddr, pi);
MM_int_GetTables(VAddr, &table0, &table1);
pi->bExecutable = 1;
pi->bGlobal = 0;
pi->bShared = 0;
-
+ pi->AP = 0;
switch( (desc & 3) )
{
case 1:
pi->Size = 16;
pi->PhysAddr = desc & 0xFFFF0000;
+ pi->AP = ((desc >> 4) & 3) | (((desc >> 9) & 1) << 2);
+ pi->bExecutable = !(desc & 0x8000);
+ pi->bShared = (desc >> 10) & 1;
+// LogF("Large page, VAddr = %p, table1[VAddr>>12] = %p, desc = %x\n", VAddr, &table1[ VAddr >> 12 ], desc);
+// LogF("Par desc = %p %x\n", &table0[ VAddr >> 20 ], table0[ VAddr >> 20 ]);
return 0;
// 2/3: Small page
case 2:
case 3:
pi->Size = 12;
pi->PhysAddr = desc & 0xFFFFF000;
- pi->bExecutable = desc & 1;
+ pi->bExecutable = !(desc & 1);
pi->bGlobal = !(desc >> 11);
pi->bShared = (desc >> 10) & 1;
+ pi->AP = ((desc >> 4) & 3) | (((desc >> 9) & 1) << 2);
return 0;
}
return 1;
pi->PhysAddr |= (Uint64)((desc >> 20) & 0xF) << 32;
pi->PhysAddr |= (Uint64)((desc >> 5) & 0x7) << 36;
pi->Size = 24;
- pi->Domain = 0; // Superpages default to zero
+ pi->Domain = 0; // Supersections default to zero
+ pi->AP = ((desc >> 10) & 3) | (((desc >> 15) & 1) << 2);
return 0;
}
pi->PhysAddr = desc & 0xFFF80000;
pi->Size = 20;
pi->Domain = (desc >> 5) & 7;
+ pi->AP = ((desc >> 10) & 3) | (((desc >> 15) & 1) << 2);
return 0;
// 3: Reserved (invalid)
MM_int_SetPageInfo(VAddr, &pi);
}
+tPAddr MM_AllocateRootTable(void)
+{
+ tPAddr ret;
+
+ ret = MM_AllocPhysRange(2, -1);
+ if( ret & 0x1000 ) {
+ MM_DerefPhys(ret);
+ MM_DerefPhys(ret+0x1000);
+ ret = MM_AllocPhysRange(3, -1);
+ if( ret & 0x1000 ) {
+ MM_DerefPhys(ret);
+ ret += 0x1000;
+ }
+ else {
+ MM_DerefPhys(ret + 0x2000);
+ }
+ }
+ return ret;
+}
+
+void MM_int_CloneTable(Uint32 *DestEnt, int Table)
+{
+ tPAddr table;
+ Uint32 *tmp_map;
+ Uint32 *cur = (void*)MM_TABLE0USER;
+// Uint32 *cur = &FRACTAL(MM_TABLE1USER,0);
+ int i;
+
+ table = MM_AllocPhys();
+ if(!table) return ;
+
+ tmp_map = (void*)MM_MapTemp(table);
+
+ for( i = 0; i < 1024; i ++ )
+ {
+ switch(cur[i] & 3)
+ {
+ case 0: tmp_map[i] = 0; break;
+ case 1:
+ tmp_map[i] = 0;
+ Log_Error("MMVirt", "TODO: Support large pages in MM_int_CloneTable");
+ // Large page?
+ break;
+ case 2:
+ case 3:
+ // Small page
+ // - If full RW
+ if( (cur[Table*256] & 0x230) == 0x030 )
+ cur[Table*256+i] |= 0x200; // Set to full RO (Full RO=COW, User RO = RO)
+ tmp_map[i] = cur[Table*256+i];
+ break;
+ }
+ }
+
+ DestEnt[0] = table + 0*0x400 + 1;
+ DestEnt[1] = table + 1*0x400 + 1;
+ DestEnt[2] = table + 2*0x400 + 1;
+ DestEnt[3] = table + 3*0x400 + 1;
+}
+
+tPAddr MM_Clone(void)
+{
+ tPAddr ret;
+ Uint32 *new_lvl1_1, *new_lvl1_2, *cur;
+ Uint32 *tmp_map;
+ int i;
+
+ ret = MM_AllocateRootTable();
+
+ cur = (void*)MM_TABLE0USER;
+ new_lvl1_1 = (void*)MM_MapTemp(ret);
+ new_lvl1_2 = (void*)MM_MapTemp(ret+0x1000);
+ tmp_map = new_lvl1_1;
+ new_lvl1_1[0] = 0x8202; // Section mapping the first meg for exception vectors (K-RO)
+ for( i = 1; i < 0x800-4; i ++ )
+ {
+// Log("i = %i", i);
+ if( i == 0x400 ) {
+ tmp_map = &new_lvl1_2[-0x400];
+ Log("tmp_map = %p", tmp_map);
+ }
+ switch( cur[i] & 3 )
+ {
+ case 0: tmp_map[i] = 0; break;
+ case 1:
+ MM_int_CloneTable(&tmp_map[i], i);
+ i += 3; // Tables are alocated in blocks of 4
+ break;
+ case 2:
+ case 3:
+ Log_Error("MMVirt", "TODO: Support Sections/Supersections in MM_Clone (i=%i)", i);
+ tmp_map[i] = 0;
+ break;
+ }
+ }
+
+ // Allocate Fractal table
+ {
+ int j, num;
+ tPAddr tmp = MM_AllocPhys();
+ Uint32 *table = (void*)MM_MapTemp(tmp);
+ Uint32 sp;
+ register Uint32 __SP asm("sp");
+ // Map table to last 4MiB of user space
+ tmp_map[i+0] = tmp + 0*0x400 + 1;
+ tmp_map[i+1] = tmp + 1*0x400 + 1;
+ tmp_map[i+2] = tmp + 2*0x400 + 1;
+ tmp_map[i+3] = tmp + 3*0x400 + 1;
+ for( j = 0; j < 256; j ++ ) {
+ table[j] = new_lvl1_1[j*4] & PADDR_MASK_LVL1;// 0xFFFFFC00;
+ table[j] |= 0x10|3; // Kernel Only, Small table, XN
+ }
+ for( ; j < 512; j ++ ) {
+ table[j] = new_lvl1_2[(j-256)*4] & PADDR_MASK_LVL1;// 0xFFFFFC00;
+ table[j] |= 0x10|3; // Kernel Only, Small table, XN
+ }
+ for( ; j < 1024; j ++ )
+ table[j] = 0;
+
+ // Get kernel stack bottom
+ sp = __SP;
+ sp &= ~(MM_KSTACK_SIZE-1);
+ j = (sp / 0x1000) % 1024;
+ num = MM_KSTACK_SIZE/0x1000;
+ Log("sp = %p, j = %i", sp, j);
+
+ // Copy stack pages
+ for(; num--; j ++, sp += 0x1000)
+ {
+ tVAddr page = MM_AllocPhys();
+ void *tmp_page;
+ table[j] = page | 0x13;
+ tmp_page = (void*)MM_MapTemp(page);
+ memcpy(tmp_page, (void*)sp, 0x1000);
+ MM_FreeTemp( (tVAddr)tmp_page );
+ }
+
+ MM_FreeTemp( (tVAddr)table );
+ }
+
+ tmp_map = &tmp_map[0x400];
+ MM_FreeTemp( (tVAddr)tmp_map );
+
+ Log("Table dump");
+ MM_DumpTables(0, -1);
+
+ return ret;
+}
+
tPAddr MM_ClearUser(void)
{
// TODO: Implement ClearUser
int i;
tMM_PageInfo pi;
+ ENTER("xPAddr iNPages", PAddr, NPages);
+
// Scan for a location
for( ret = MM_HWMAP_BASE; ret < MM_HWMAP_END - NPages * PAGE_SIZE; ret += PAGE_SIZE )
{
+// LOG("checking %p", ret);
// Check if there is `NPages` free pages
for( i = 0; i < NPages; i ++ )
{
break;
}
// Nope, jump to after the used page found and try again
+// LOG("i = %i, ==? %i", i, NPages);
if( i != NPages ) {
ret += i * PAGE_SIZE;
continue ;
for( i = 0; i < NPages; i ++ )
MM_Map(ret+i*PAGE_SIZE, PAddr+i*PAddr);
// and return
+ LEAVE('p', ret);
return ret;
}
Log_Warning("MMVirt", "MM_MapHWPages: No space for a %i page block", NPages);
+ LEAVE('p', 0);
return 0;
}
return addr + ofs;
}
+void MM_int_DumpTableEnt(tVAddr Start, size_t Len, tMM_PageInfo *Info)
+{
+ Log("%p => %8x - 0x%7x %i %x",
+ Start, Info->PhysAddr-Len, Len,
+ Info->Domain,
+ Info->AP
+ );
+}
+
void MM_DumpTables(tVAddr Start, tVAddr End)
{
+ tVAddr range_start = 0, addr;
+ tMM_PageInfo pi, pi_old;
+ int i = 0, inRange=0;
+ pi_old.Size = 0;
+
+ range_start = Start;
+ for( addr = Start; i == 0 || (addr && addr < End); i = 1 )
+ {
+ int rv = MM_int_GetPageInfo(addr, &pi);
+ if( rv
+ || pi.Size != pi_old.Size
+ || pi.Domain != pi_old.Domain
+ || pi.AP != pi_old.AP
+ || pi_old.PhysAddr != pi.PhysAddr )
+ {
+ if(inRange) {
+ MM_int_DumpTableEnt(range_start, addr - range_start, &pi_old);
+ }
+ addr &= ~((1 << pi.Size)-1);
+ range_start = addr;
+ }
+
+ pi_old = pi;
+ pi_old.PhysAddr += 1 << pi_old.Size;
+ addr += 1 << pi_old.Size;
+ inRange = (rv == 0);
+ }
+ if(inRange)
+ MM_int_DumpTableEnt(range_start, addr - range_start, &pi);
}
extern tThread gThreadZero;
extern void SwitchTask(Uint32 NewSP, Uint32 *OldSP, Uint32 NewIP, Uint32 *OldIP, Uint32 MemPtr);
extern void KernelThreadHeader(void); // Actually takes args on stack
-extern void Proc_CloneInt(Uint32 *SP, Uint32 *MemPtr);
+extern Uint32 Proc_CloneInt(Uint32 *SP, Uint32 *MemPtr);
extern tVAddr MM_NewKStack(int bGlobal); // TODO: Move out into a header
// === PROTOTYPES ===
void Proc_IdleThread(void *unused)
{
Threads_SetPriority(gpIdleThread, -1);
- Threads_SetName("Idle Thread");
for(;;) {
Proc_Reschedule();
__asm__ __volatile__ ("wfi");
tid = Proc_NewKThread( Proc_IdleThread, NULL );
gpIdleThread = Threads_GetThread(tid);
+ gpIdleThread->ThreadName = (char*)"Idle Thread";
}
int GetCPUNum(void)
tTID Proc_Clone(Uint Flags)
{
tThread *new;
+ Uint32 pc, sp, mem;
new = Threads_CloneTCB(Flags);
if(!new) return -1;
+
+ // Actual clone magic
+ pc = Proc_CloneInt(&sp, &mem);
+ if(pc == 0) {
+ Log("Proc_Clone: In child");
+ return 0;
+ }
- Log_Error("Proc", "TODO: Implement Proc_Clone");
-
- return -1;
+ new->SavedState.IP = pc;
+ new->SavedState.SP = sp;
+ new->MemState.Base = mem;
+
+ Threads_AddActive(new);
+
+ return new->TID;
}
tTID Proc_SpawnWorker( void (*Fnc)(void*), void *Ptr )
new = Threads_CloneThreadZero();
if(!new) return -1;
+ free(new->ThreadName);
+ new->ThreadName = NULL;
new->KernelStack = MM_NewKStack(1);
if(!new->KernelStack) {
new = Threads_CloneTCB(0);
if(!new) return -1;
+ free(new->ThreadName);
+ new->ThreadName = NULL;
// TODO: Non-shared stack
new->KernelStack = MM_NewKStack(1);
if(!next) next = gpIdleThread;
if(!next || next == cur) return;
- Log("Switching to %p (%i %s) IP=%p SP=%p", next, next->TID, next->ThreadName, next->SavedState.IP, next->SavedState.SP);
+ Log("Switching to %p (%i %s)", next, next->TID, next->ThreadName);
+ Log(" IP=%p SP=%p TTBR0=%p", next->SavedState.IP, next->SavedState.SP, next->MemState.Base);
Log("Requested by %p", __builtin_return_address(0));
gpCurrentThread = next;
- // TODO: Change kernel stack?
SwitchTask(
next->SavedState.SP, &cur->SavedState.SP,
#include "include/assembly.h"
+#include "include/options.h"
-KERNEL_BASE = 0x80000000
-PCI_PADDR = 0x60000000 @ Realview
-UART0_PADDR = 0x10009000 @ Realview
@
@ Exception defs taken from ARM DDI 0406B
@
ivt_reset: b _start @ Reset
ivt_undef: b . @ #UD
ivt_svc: b SyscallHandler @ SVC (SWI assume)
-ivt_prefetch: b DataAbort @ Prefetch abort
+ivt_prefetch: b PrefetchAbort @ Prefetch abort
ivt_data: b DataAbort @ Data abort
ivt_unused: b . @ Not Used
ivt_irq: b IRQHandler @ IRQ
ldr sp, =irqstack+0x1000 @ Set up stack
cps #19
- ldr sp, =stack+0x10000 @ Set up stack
+@ ldr sp, =stack+0x10000 @ Set up stack
+ ldr sp, =0x80000000-4 @ Set up stack (top of user range)
ldr r0, =kmain
mov pc, r0
1: b 1b @ Infinite loop
_ptr_kmain:
.long kmain
-.comm stack, 0x10000 @ ; 64KiB Stack
.comm irqstack, 0x1000 @ ; 4KiB Stack
SyscallHandler:
sub lr, #8 @ Adjust LR to the correct value
srsdb sp!, #19 @ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
cpsid ifa, #19
- PUSH_GPRS
+@ PUSH_GPRS
+ mrc p15, 0, r4, c5, c0, 0 @ Read DFSR (Data Fault Address Register) to stack
+ push {r4}
+ mrc p15, 0, r3, c6, c0, 0 @ Read DFAR (Data Fault Address Register) into R3
mov r2, lr
ldr r1, =csDataAbort_Fmt
- ldr r0, =csDataAbort_Tag
+ ldr r0, =csAbort_Tag
ldr r4, =Log_Error
blx r4
b .
rfeia sp! @ Pop state (actually RFEFD)
bx lr
+.globl PrefetchAbort
+PrefetchAbort:
+ sub lr, #4 @ Adjust LR to the correct value
+ srsdb sp!, #19 @ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+ cpsid ifa, #19
+ PUSH_GPRS
+
+ ldr r0, =csAbort_Tag
+ ldr r1, =csPrefetchAbort_Fmt
+ mov r2, lr
+ mrc p15, 0, r3, c5, c0, 0 @ Read IFSR (Instruction Fault Address Register) into R3
+ ldr r4, =Log_Error
+ blx r4
+ b .
+
csIRQ_Tag:
-csDataAbort_Tag:
+csAbort_Tag:
.asciz "ARMv7"
csIRQ_Fmt:
.asciz "IRQ"
csDataAbort_Fmt:
- .asciz "Data Abort at %p"
-
-.comm irqstack, 0x1000
+ .asciz "Data Abort - %p accessed %p, DFSR=%x Unk:%x Unk:%x"
+csPrefetchAbort_Fmt:
+ .asciz "Prefetch Abort at %p, IFSR=%x"
.section .padata
.globl kernel_table0
.rept 0x7FC - 1
.long 0
.endr
- .long user_table1_map + 0x000 - KERNEL_BASE + 1
- .long user_table1_map + 0x400 - KERNEL_BASE + 1
- .long 0 @ user_table1_map + 0x800 - KERNEL_BASE + 1
- .long 0 @ user_table1_map + 0xC00 - KERNEL_BASE + 1
+ .long user_table1_map + 0x000 - KERNEL_BASE + 1 @ 0x7FC00000
+ .long user_table1_map + 0x400 - KERNEL_BASE + 1 @ 0x7FD00000
+ .long user_table1_map + 0x800 - KERNEL_BASE + 1 @ KStacks
+ .long user_table1_map + 0xC00 - KERNEL_BASE + 1
@ 0x80000000 - User/Kernel split
.long 0x00000002 @ Map first 4 MiB to 2GiB
.long 0x00100002 @
.long kernel_table1_map + 0x400 - KERNEL_BASE + 1
.long kernel_table1_map + 0x800 - KERNEL_BASE + 1
.long kernel_table1_map + 0xC00 - KERNEL_BASE + 1
- @ Top level fractals
- .long 0 @ removed for alignment constraints, using the KERNEL_BASE identity mapping instead
- .rept 0x1000 - 0xFF8 - 5
+ .rept 0x1000 - 0xFFC
.long 0
.endr
@ PID0 user table
.globl user_table1_map
-user_table1_map: @ Size = 4KiB
- .rept 0x7F8/4
+@ User table1 data table (only the first half is needed)
+@ - Abused to provide kernel stacks in upper half
+user_table1_map: @ Size = 4KiB (only 2KiB used)
+ .rept 0x800/4-4
.long 0
.endr
- .long kernel_table0 - KERNEL_BASE + (1 << 4) + 3
- .long user_table1_map - KERNEL_BASE + (1 << 4) + 3
- .rept 0x800/4
+ .long kernel_table0 + 0x0000 - KERNEL_BASE + 0x10 + 3 @ ...1FC000 = 0x7FDDC000
+ .long kernel_table0 + 0x1000 - KERNEL_BASE + 0x10 + 3 @ ...1FD000 = 0x7FDDD000
+ .long 0
+ .long user_table1_map - KERNEL_BASE + 0x10 + 3 @ ...1FF000 = 0x7FDFF000
+ @ Kernel stack zone
+ .rept (0x800/4)-(MM_KSTACK_SIZE/0x1000)
.long 0
.endr
+ #if MM_KSTACK_SIZE != 0x2000
+ #error Kernel stack size not changed in start.S
+ #endif
+ .long stack + 0x0000 - KERNEL_BASE + 0x10 + 3 @ Kernel Stack
+ .long stack + 0x1000 - KERNEL_BASE + 0x10 + 3 @
.globl kernel_table1_map
kernel_table1_map: @ Size = 4KiB
- .rept 0xF00/4
+ .rept (0xF00+16)/4
.long 0
.endr
.long hwmap_table_0 - KERNEL_BASE + (1 << 4) + 3
- .rept 0xFF8/4 - 0xF00/4 - 1
+ .rept 0xFF8/4 - (0xF00+16)/4 - 1
.long 0
.endr
.long kernel_table1_map - KERNEL_BASE + (1 << 4) + 3
.long 0
.endr
+.section .padata
+stack:
+ .space MM_KSTACK_SIZE, 0 @ Original kernel stack
+
git.ucc.asn.au / tpg / acess2.git / commitdiff
UCC git Repository :: git.ucc.asn.au