--- /dev/null
+#
+# Acess2 Kernel
+# arm7 Architecture Makefile
+# arch/arm7/Makefile
+
+CPPFLAGS =
+CFLAGS =
+ASFLAGS =
+
+ifeq ($(ARCH),integrator-cp)
+ MMU_PRESENT=1
+else
+ MMU_PRESENT=1
+endif
+
+
+
+#ASFLAGS += -D USE_MP=$(USE_MP) -D USE_PAE=$(USE_PAE)
+CPPFLAGS += -DMMU_PRESENT=$(MMU_PRESENT)
+
+A_OBJ = start.ao main.o
--- /dev/null
+/*
+ * Acess2
+ * ARM7 Architecture Header
+ */
+#ifndef _ARCH_H_
+#define _ARCH_H_
+
+// === CONSTANTS ===
+#define INVLPTR ((void*)-1)
+#define BITS 32
+
+// === TYPES ===
+typedef unsigned int Uint;
+typedef unsigned char Uint8;
+typedef unsigned short Uint16;
+typedef unsigned long Uint32;
+typedef unsigned long long Uint64;
+typedef signed int Sint;
+typedef signed char Sint8;
+typedef signed short Sint16;
+typedef signed long Sint32;
+typedef signed long long Sint64;
+
+typedef int size_t;
+typedef char BOOL;
+
+typedef Uint32 tVAddr;
+typedef Uint32 tPAddr;
+
+#include <lock.h>
+
+// --- Debug
+extern void Debug_PutCharDebug(char Ch);
+extern void Debug_PutStringDebug(const char *String);
+
+
+#endif
--- /dev/null
+/*
+ * Acess2
+ * ARM7 Architecture
+ *
+ * lock.h - Hardware level spinlocks
+ */
+#ifndef _LOCK_H_
+#define _LOCK_H_
+
+// === CODE ===
+struct sShortSpinlock {
+ int Lock;
+};
+
+// --- Spinlocks ---
+static inline int IS_LOCKED(struct sShortSpinlock *Lock)
+{
+ return !!Lock->Lock;
+}
+
+static inline int CPU_HAS_LOCK(struct sShortSpinlock *Lock)
+{
+ // TODO: Handle multiple CPUs
+ return !!Lock->Lock;
+}
+
+static inline int SHORTLOCK(struct sShortSpinlock *Lock)
+{
+ // Shamelessly copied from linux (/arch/arm/include/asm/spinlock.h) until I can fix stuff
+ Uint tmp;
+ __asm__ __volatile__ (
+ "1: ldrex %0, [%1]\n"
+ " teq %0, #0\n"
+ " strexeq %0, %2, [%1]\n" // Magic? TODO: Look up
+ " teqeq %0, #0\n"
+ " bne 1b"
+ : "=&r" (tmp) // Temp
+ : "r" (&Lock->Lock), "r" (1)
+ : "cc" // Condition codes clobbered
+ );
+ return 1;
+}
+
+static inline void SHORTREL(struct sShortSpinlock *Lock)
+{
+ Lock->Lock = 0;
+}
+
+#endif
+
--- /dev/null
+/*
+ * Acess2
+ * ARM7 Virtual Memory Manager Header
+ */
+#ifndef _MM_VIRT_H_
+#define _MM_VIRT_H_
+
+#define KERNEL_BASE 0x80000000 // 2GiB
+
+// Page Blocks are 12-bits wide (12 address bits used)
+// Hence, the table is 16KiB large (and must be so aligned)
+// and each block addresses 1MiB of data
+
+#define MM_KHEAP_BASE 0x80800000 // 8MiB of kernel code
+#define MM_KHEAP_MAX 0xC0000000 // 1GiB of kernel heap
+
+#define MM_FRACTAL 0xFFE00000 // 2nd last block
+
+#endif
--- /dev/null
+/*
+ * Acess2
+ * ARM7 Architecture
+ *
+ * proc.h - Arch-Dependent Process Management
+ */
+#ifndef _PROC_H_
+#define _PROC_H_
+
+#define MAX_CPUS 4
+
+// === STRUCTURES ===
+typedef struct {
+ Uint32 IP, LR, SP;
+ Uint32 UserIP, UserSP;
+} tTaskState;
+
+typedef struct {
+ Uint32 Base;
+} tMemoryState;
+
+typedef struct {
+ union {
+ Uint32 Num;
+ Uint32 Error;
+ };
+ union {
+ Uint32 Arg1;
+ Uint32 Return;
+ };
+ union {
+ Uint32 Arg2;
+ Uint32 RetHi;
+ };
+ Uint32 Arg3;
+ Uint32 Arg4;
+ Uint32 Arg5;
+ Uint32 Arg6; // R6
+ Uint32 Unused[13-6];
+ Uint32 StackPointer; // R13
+ Uint32 _lr;
+ Uint32 _ip;
+} tSyscallRegs;
+
+// === MACROS ===
+#define HALT() __asm__ __volatile__ ("nop")
+
+// === PROTOTYPES ===
+extern void Proc_Start(void);
+extern tTID Proc_Clone(Uint *Errno, int Flags);
+
+#endif
+
--- /dev/null
+/*
+ * Acess2 ARM7 Port
+ *
+ * lib.c - Library Functions
+ */
+#include <acess.h>
+
+// === CODE ===
--- /dev/null
+/*
+ * Acess2
+ *
+ * ARM7 Entrypoint
+ * arch/arm7/main.c
+ */
+
+// === IMPORTS ===
+extern void Interrupts_Setup(void);
+extern void MM_SetupPhys(void);
+
+// === PROTOTYPES ===
+ int kmain(void);
+
+// === CODE ===
+int kmain(void)
+{
+ Interrupts_Setup();
+
+ MM_SetupPhys();
+
+ //TODO:
+ for(;;);
+}
--- /dev/null
+interrupt_vector_table:
+ b . @ Reset
+ b .
+ b . @ SWI instruction
+ b .
+ b .
+ b .
+ b .
+ b .
+
+.comm stack, 0x10000 @ ; 64KiB Stack
+
+.globl _start
+_start:
+ ldr sp, =stack+0x10000 @ Set up stack
+ bl main
+1: b 1b @ Infinite loop
+