*.o.*
*.d.*
+*.xo.*
*~
*.o
*.d
*.bin
*.dsm
*.dmp
-*.txt
+*.kmd.*
-BUILD_NUM = 2216
+BUILD_NUM = 2225
A_OBJ = start32.ao start64.ao desctab.ao
A_OBJ += main.o lib.o proc.o mm_virt.o mm_phys.o vm8086.o
-A_OBJ += kernelpanic.o
+A_OBJ += kernelpanic.o errors.o
[section .text]
[global Desctab_Init]
-Desctab_Init:
- ; Install IDT
- mov rax, gIDTPtr
- lidt [rax]
-
+Desctab_Init:
; Save to make following instructions smaller
mov rdi, gIDT
mov rax, %2
mov WORD [rdi + %1*16], ax
shr rax, 16
- mov WORD [rdi + %1*16+6], ax
+ mov WORD [rdi + %1*16 + 6], ax
shr rax, 16
- mov DWORD [rdi+%1*16+8], eax
+ mov DWORD [rdi + %1*16 + 8], eax
; Enable
mov ax, WORD [rdi + %1*16 + 4]
or ax, 0x8000
%endrep
; Install IRQs
- %macro SETIRQ 2
- SETIDT %2, Irq%1
+ %macro SETIRQ 1
+ SETIDT 0xF0+%1, Irq%1
%endmacro
%assign i 0
%rep 16
- SETIRQ i, 0xF0+i
+ SETIRQ i
%assign i i+1
%endrep
-
+
; Remap PIC
+ push rdx ; Save RDX
+ mov dx, 0x20
+ mov al, 0x11
+ out dx, al ; Init Command
+ mov dx, 0x21
+ mov al, 0xF0
+ out dx, al ; Offset (Start of IDT Range)
+ mov al, 0x04
+ out dx, al ; IRQ connected to Slave (00000100b) = IRQ2
+ mov al, 0x01
+ out dx, al ; Set Mode
+ mov al, 0x00
+ out dx, al ; Set Mode
+
+ mov dx, 0xA0
+ mov al, 0x11
+ out dx, al ; Init Command
+ mov dx, 0xA1
+ mov al, 0xF8
+ out dx, al ; Offset (Start of IDT Range)
+ mov al, 0x02
+ out dx, al ; IRQ Line connected to master
+ mov al, 0x01
+ out dx, al ; Set Mode
+ mov dl, 0x00
+ out dx, al ; Set Mode
+ pop rdx
+
+
+ ; Install IDT
+ mov rax, gIDTPtr
+ lidt [rax]
+
+ ; Start interrupts
+ sti
ret
ISR_NOERRNO 30; 30: Reserved
ISR_NOERRNO 31; 31: Reserved
+[extern Error_Handler]
+[global ErrorCommon]
ErrorCommon:
+ PUSH_GPR
+ push gs
+ push fs
+ ;PUSH_FPU
+ ;PUSH_XMM
+
+ mov rsi, rsp
+ call Error_Handler
+
+ ;POP_XMM
+ ;POP_FPU
+ pop fs
+ pop gs
+ POP_GPR
add rsp, 2*8
iret
[section .data]
gIDT:
- times 256 dd 0x00080000, 0x00008E00, 0, 0 ; 64-bit Interrupt Gate, CS = 0x8, IST0
+ times 256 dd 0x00080000, 0x00000E00, 0, 0 ; 64-bit Interrupt Gate, CS = 0x8, IST0
gIDTPtr:
dw 256*16-1
dq gIDT
--- /dev/null
+/*
+ * Acess2 x86_64 Project
+ * - Error Handling
+ */
+#include <acess.h>
+#include <proc.h>
+
+// === PROTOTYPES ===
+void Error_Handler(tRegs *Regs);
+
+// === GLOBALS ==
+const char * const csaERROR_NAMES[] = {
+ "Divide By Zero", "Debug", "NMI Exception", "INT3",
+ "INTO", "Out of Bounds", "Invalid Opcode", "Coprocessor not avaliable",
+ "Double Fault", "Coprocessor Segment Overrun", "Bad TSS", "Segment Not Present",
+ "Stack Fault Exception", "GPF", "#PF", "Reserved",
+ "Floating Point Exception", "Alignment Check Exception", "Machine Check Exception", "Reserved",
+ "Reserved", "Reserved", "Reserved", "Reserved",
+ "Reserved", "Reserved", "Reserved", "Reserved",
+ "Reserved", "Reserved", "Reserved", "Reserved"
+ };
+
+// === CODE ===
+void Error_Handler(tRegs *Regs)
+{
+ Uint cr;
+
+ Debug_KernelPanic();
+
+ Warning("CPU Error %i - %s, Code: 0x%x",
+ Regs->IntNum, csaERROR_NAMES[Regs->IntNum], Regs->ErrorCode);
+ Warning(" CS:RIP = 0x%04x:%016x", Regs->CS, Regs->RIP);
+ Warning(" SS:RSP = 0x%04x:%016x", Regs->SS, Regs->RIP);
+ Warning(" RFLAGS = 0x%016x", Regs->RFlags);
+ Warning(" EAX %016x ECX %016x EDX %016x EBX %016x",
+ Regs->RAX, Regs->RCX, Regs->RDX, Regs->RBX);
+ Warning(" ESP %016x EBP %016x ESI %016x EDI %016x",
+ Regs->RSP, Regs->RBP, Regs->RSP, Regs->RDI);
+
+ Warning(" FS %04x GS %04x", Regs->FS, Regs->GS);
+
+
+ // Control Registers
+ __asm__ __volatile__ ("mov %%cr0, %0":"=r"(cr));
+ Warning(" CR0 0x%08x", cr);
+ __asm__ __volatile__ ("mov %%cr2, %0":"=r"(cr));
+ Warning(" CR2 0x%08x", cr);
+ __asm__ __volatile__ ("mov %%cr3, %0":"=r"(cr));
+ Warning(" CR3 0x%08x", cr);
+ __asm__ __volatile__ ("mov %%cr4, %0":"=r"(cr));
+ Warning(" CR4 0x%08x", cr);
+
+ switch( Regs->IntNum )
+ {
+ case 6: // #UD
+ Warning(" Offending bytes: %02x %02x %02x %02x",
+ *(Uint8*)Regs->RIP+0, *(Uint8*)Regs->RIP+1,
+ *(Uint8*)Regs->RIP+2, *(Uint8*)Regs->RIP+3);
+ break;
+ }
+
+ for(;;)
+ __asm__ __volatile__ ("hlt");
+}
// Register Structure
// TODO: Rebuild once IDT code is done
typedef struct {
- Uint rax, rcx, rdx, rbx;
- Uint krsp, rbp, rsi, rdi;
- Uint r8, r9, r10, r11;
- Uint r12, r13, r14, r15;
- Uint int_num, err_code;
- Uint rip, cs;
- Uint rflags, rsp, ss;
+ // MMX
+ // FPU
+ Uint FS, GS;
+ Uint RAX, RCX, RDX, RBX;
+ Uint KernelRSP, RBP, RSI, RDI;
+ Uint R8, R9, R10, R11;
+ Uint R12, R13, R14, R15;
+ Uint IntNum, ErrorCode;
+ Uint RIP, CS;
+ Uint RFlags, RSP, SS;
} tRegs;
/**
/*
+ * Acess2 x86_64 port
+ * - Kernel Panic output
*/
+#include <acess.h>
// === PROTOTYPES ===
void KernelPanic_SetMode(void);
void KernelPanic_PutChar(char ch);
+// === GLOBALS ===
+Uint16 *gpKernelPanic_Buffer = (void*)( KERNEL_BASE|0xB8000 );
+ int giKernelPanic_CurPos = 0;
+// === CODE ===
void KernelPanic_SetMode(void)
{
+ giKernelPanic_CurPos = 0;
}
void KernelPanic_PutChar(char ch)
{
-
+ switch(ch)
+ {
+ case '\n':
+ giKernelPanic_CurPos += 80;
+ case '\r':
+ giKernelPanic_CurPos /= 80;
+ giKernelPanic_CurPos *= 80;
+ break;
+
+ default:
+ if(' ' <= ch && ch <= 0x7F)
+ gpKernelPanic_Buffer[giKernelPanic_CurPos] = 0x4F00|ch;
+ giKernelPanic_CurPos ++;
+ break;
+ }
}
*(Uint16*)(0xB8000) = 0x1F00|'A';
Desctab_Init();
+ *(Uint16*)(0xB8000) = 0x1F00|'B';
+
MM_InitVirt();
+ *(Uint16*)(0xB8000) = 0x1F00|'B';
for(;;)
__asm__ __volatile__ ("hlt");
/*
- * AcessOS Microkernel Version
+ * Acess2 x86_64 port
* proc.c
*/
#include <acess.h>
*/
int Proc_Demote(Uint *Err, int Dest, tRegs *Regs)
{
- int cpl = Regs->cs & 3;
+ int cpl = Regs->CS & 3;
// Sanity Check
if(Dest > 3 || Dest < 0) {
*Err = -EINVAL;
}
// Change the Segment Registers
- Regs->cs = (((Dest+1)<<4) | Dest) - 8;
- Regs->ss = ((Dest+1)<<4) | Dest;
+ Regs->CS = (((Dest+1)<<4) | Dest) - 8;
+ Regs->SS = ((Dest+1)<<4) | Dest;
return 0;
}
[section .bss]
[global gInitialKernelStack]
- resd 1024*1 ; 1 Page
+ resd 1024*4 ; 4 Pages
gInitialKernelStack:
git.ucc.asn.au / tpg / acess2.git / commitdiff
UCC git Repository :: git.ucc.asn.au