displayreset:
; Reset the display
-; Clear bit 7 of PortA - display reset
+; Clear bit 7 of PortA - display reset (active low)
BE69 CE 10 00 ... ldx #1000
BE6C 1D 00 80 .. bclr x,#80
BE6F BD E5 96 ... jsr e596 ;jump115 - 100ms delay
-; Clear bit 7 of PortA - reset line back to high (not active)
+; Clear bit 7 of PortA - reset line back to high
BE72 CE 10 00 ... ldx #1000
BE75 1C 00 80 .. bset 00,x, #80
C0FB 5F . clrb
C0FC 4F O clra
C0FD 39 9 rts
-
+;
C0FE CE 00 14 ... ldx #0014
C101 1C 00 01 ... bset 00,x, #01
C104 F6 00 14 ... ldab 0014
C12D 5F _ clrb
C12F 4F O clra
C130 39 9 rts
-
+;
C131 20 E6 . bra e6
C133 FC 00 3E ..> ldd 003e
C136 F3 00 40 ..@ addd 0040
C1F8 38 8 pulx
C1F9 38 8 pulx
C1FA 24 11 $. bcc 11
-C1FC CE 00 C8 ... ldx #00c8
+C1FC CE 00 C8 ... ldx #00c8 ; 200
C1FF 3C < pshx
C200 CC FF 38 ..8 ldd #ff38 ; -200
C203 37 7 pshb
C28F FC 0C FF ... ldd 0cff
C292 37 7 pshb
C293 36 6 psha
-C294 CE FC 18 ... ldx #fc18
+C294 CE FC 18 ... ldx #fc18 ; -1000
C297 3C < pshx
C298 CC 03 E7 ... ldd #03e7
C29B 30 0 tsx
C2A4 38 8 pulx
C2A5 38 8 pulx
C2A6 24 11 $. bcc 11
-C2A8 CE 03 E8 ... ldx #03e8
+C2A8 CE 03 E8 ... ldx #03e8 ; 1000
C2AB 3C < pshx
-C2AC CC FC 18 ... ldd #fc18
+C2AC CC FC 18 ... ldd #fc18 ; -1000
C2AF 37 7 pshb
C2B0 36 6 psha
C2B1 CC 0C FF ... ldd #0cff
C2B8 31 1 ins
C2B9 20 53 S bra 53
C2BB FC 0C E5 ... ldd 0ce5
-C2BE 83 C3 4F ..O subd #c34f
+C2BE 83 C3 4F ..O subd #c34f ; 49999
C2C1 26 05 &. bne 05
C2C3 5F _ clrb
C2C4 4F O clra
C2C8 FE 0C E5 ... ldx 0ce5
C2CB 08 . inx
C2CC FF 0C E5 ... stx 0ce5
-C2CF CE 07 D0 ... ldx #07d0
+C2CF CE 07 D0 ... ldx #07d0 ; 2000
C2D2 3C < pshx
C2D3 CC 00 00 ... ldd #0000
C2D6 37 7 pshb
C2D7 36 6 psha
-C2D8 CC 0D 03 ... ldd #0d03
+C2D8 CC 0D 03 ... ldd #0d03 ; 3331
C2DB BD FB DF ... jsr fbdf ;jump46
C2DE 31 1 ins
C2DF 31 1 ins
C2E4 FC 0D 03 ... ldd 0d03
C2E7 37 7 pshb
C2E8 36 6 psha
-C2E9 CE D9 30 ..0 ldx #d930
+C2E9 CE D9 30 ..0 ldx #d930 ; -9936
C2EC 3C < pshx
-C2ED CC 05 F5 ... ldd #05f5
+C2ED CC 05 F5 ... ldd #05f5 ; 1525
C2F0 30 0 tsx
C2F1 A3 02 .. subd 02,x
C2F3 32 2 pula
C2F9 38 8 pulx
C2FA 38 8 pulx
C2FB 24 11 $. bcc 11
-C2FD CE 26 D0 .&. ldx #26d0
+C2FD CE 26 D0 .&. ldx #26d0 ; 9936
C300 3C < pshx
-C301 CC FA 0A ... ldd #fa0a
+C301 CC FA 0A ... ldd #fa0a ; -1526
C304 37 7 pshb
C305 36 6 psha
-C306 CC 0D 03 ... ldd #0d03
+C306 CC 0D 03 ... ldd #0d03 ; 3331
C309 BD FB DF ... jsr fbdf ;jump46
C30C 31 1 ins
C30D 31 1 ins
C311 2C 02 ,. bge 02
C313 20 F9 . bra f9
C315 CE 00 15 ... ldx #0015
-C318 1D 00 .. bclr add,x 00,x
-C31A 1F CE 00 1D .... brclr ce,x 00 1d
-;goto34
-; c31b???
-C31E 1D 00 .. bclr add,x 00,x
-C320 20 CC . bra cc
-C322 00 . test
-C323 01 . nop
+C318 1D 00 1F .. bclr 00,x, #1f
+goto34:
+C31B CE 00 1D ... ldx #001d
+C31E 1D 00 20 .. bclr 00,x, #20
+C320 CC 00 01 . ldd #0001
C324 39 9 rts
jump64:
jump124:
; chat to changer
C67D F6 00 30 ..0 ldab 0030
-C680 26 55 &U bne 55
+C680 26 55 &U bne 55 ; to c6d7
C682 F6 0B C0 ... ldab 0bc0
C685 C4 04 .. andb #04 ; have a card reader
-C687 26 4E &N bne 4e
+C687 26 4E &N bne 4e ; to c6d7
C689 C6 27 .' ldab #27
C68B F7 10 2D ..- stab 102d ; disable SCI transmission
C68E C6 07 .. ldab #07
C6D0 C6 1E .. ldab #1e
C6D2 F7 00 35 ..5 stab 0035
C6D5 20 5D ] bra 5d
+;
C6D7 F6 18 00 ... ldab 1800
C6DA 2D 2A -* blt 2a
C6DC F6 00 07 ... ldab 0007
jump37:
C7E7 37 7 pshb
C7E8 36 6 psha
-C7E9 C6 32 .2 ldab #32 ; 50
+C7E9 C6 32 .2 ldab #32 ; 50 00110010
C7EB F7 00 31 ..1 stab 0031
C7EE 30 0 tsx
C7EF E6 01 .. ldab 01,x
CC10 27 03 '. beq 03
CC12 7E CE 3B ~.; jmp ce3b ;goto54 - swallow a byte & exit
;
-CC15 C6 32 .2 ldab #32 ; 50
+CC15 C6 32 .2 ldab #32 ; 50 00110010
CC17 F7 00 2F ../ stab 002f
-CC1A CE 00 1B ... ldx #001b
+CC1A CE 00 1B ... ldx #001b ; say we have a link master?
CC1D 1C 00 02 ... bset 00,x, #02
CC20 F6 10 2E ... ldab 102e ; SCI status
CC23 C4 02 .. andb #02 ; test for Framing Error
DE11 F7 00 2C .., stab 002c
DE14 39 9 rts
-dump118:
+jump118:
DE15 F6 00 1B ... ldab 001b
DE18 C4 01 .. andb #01
DE1A 26 03 &. bne 03
-DE1C 7E DE A4 ~.. jmp dea4 ;goto70
+DE1C 7E DE A4 ~.. jmp dea4 ;goto70 - return
DE1F F6 00 06 ... ldab 0006
DE22 4F O clra
DE23 05 . asld
DE2C 27 76 'v beq 76
DE2E F6 00 11 ... ldab 0011
DE31 C4 08 .. andb #08
-DE33 26 33 &3 bne 33
+DE33 26 33 &3 bne 33 ; to de68
DE35 F6 00 06 ... ldab 0006
DE38 F1 0B AF ... cmpb 0baf
-DE3B 27 20 ' beq 20
+DE3B 27 20 ' beq 20 ; to de5d
DE3D F6 00 06 ... ldab 0006
DE40 F1 0B AE ... cmpb 0bae
-DE43 27 18 '. beq 18
+DE43 27 18 '. beq 18 ; to de5d
DE45 F6 00 06 ... ldab 0006
DE48 F1 0B AD ... cmpb 0bad
-DE4B 27 10 '. beq 10
+DE4B 27 10 '. beq 10 ; to de5d
DE4D F6 00 06 ... ldab 0006
DE50 F1 0B AC ... cmpb 0bac
-DE53 27 08 '. beq 08
+DE53 27 08 '. beq 08 ; to de5d
DE55 F6 00 06 ... ldab 0006
DE58 F1 0B AB ... cmpb 0bab
-DE5B 26 0B &. bne 0b
+DE5B 26 0B &. bne 0b ; to de68
+;
DE5D CE 00 1B ... ldx #001b
DE60 1D 00 01 ... bclr 00,x, #01
DE63 7F 00 4F ..O clr 004f
-DE66 20 3C < bra 3c
+DE66 20 3C < bra 3c ; return
+;
DE68 FC 00 44 ..D ldd 0044
DE6B B3 0B B7 ... subd 0bb7
-DE6E 23 2B #+ bls 2b
+DE6E 23 2B #+ bls 2b ; to de99 - return
DE70 FC 00 40 ..@ ldd 0040
DE73 F3 00 3E ..> addd 003e
DE76 37 7 pshb
DE82 A3 00 .. subd 00,x
DE84 31 1 ins
DE85 31 1 ins
-DE86 22 13 ". bhi 13
+DE86 22 13 ". bhi 13 ; to de9b
DE88 FC 0B B7 ... ldd 0bb7
-DE8B 27 0E '. beq 0e
+DE8B 27 0E '. beq 0e ; to de9b
DE8D FC 00 44 ..D ldd 0044
DE90 B3 0B B7 ... subd 0bb7
DE93 F3 00 44 ..D addd 0044
DE96 FD 00 44 ..D std 0044
-DE99 20 09 . bra 09
+DE99 20 09 . bra 09 ; return
+;
DE9B CE 00 1B ... ldx #001b
DE9E 1D 00 01 ... bclr 00,x, #01
DEA1 7F 00 4F ..O clr 004f
; revolves around coinage
DEE7 F6 0B C0 ... ldab 0bc0
DEEA C4 01 .. andb #01 ; have a dumb mech
-DEEC 26 07 &. bne 07
+DEEC 26 07 &. bne 07 ; to def5
DEEE F6 0B C0 ... ldab 0bc0
DEF1 C4 04 .. andb #04 ; have a card reader
-DEF3 27 15 '. beq 15
+DEF3 27 15 '. beq 15 ; if not to df0a
+; have dumb mech:
DEF5 C6 FF .. ldab #ff
DEF7 F7 0B BC ... stab 0bbc
DEFA F6 00 15 ... ldab 0015
-DEFD 2D 03 -. blt 03
+DEFD 2D 03 -. blt 03 ; to df02
DEFF BD C6 7D ..} jsr c67d ;jump124 - chat to changer
DF02 BD D6 6B ..k jsr d66b ;jump107 - chat to bill acceptor
DF05 BD DC A3 ... jsr dca3 ;jump29
-DF08 20 25 % bra 25
+DF08 20 25 % bra 25 ; to df2f
+; test the link master?
DF0A F6 0B C0 ... ldab 0bc0
-DF0D C4 02 .. andb #02 ;have changer
-DF0F 27 1E '. beq 1e
+DF0D C4 02 .. andb #02 ;have link master
+DF0F 27 1E '. beq 1e ; to df2f
DF11 F6 00 2F ../ ldab 002f
-DF14 26 19 &. bne 19
+DF14 26 19 &. bne 19 ; to df2f
DF16 F6 00 1B ... ldab 001b
DF19 C4 02 .. andb #02
-DF1B 26 12 &. bne 12
+DF1B 26 12 &. bne 12 ; to df2f
DF1D CC 00 FF ... ldd #00ff
DF20 BD C7 E7 ... jsr c7e7 ;jump37 - send to serial port
DF23 CE 00 1B ... ldx #001b
DF26 1C 00 02 .. bset 00,x, #02
DF29 CE 0B C1 ... ldx #0bc1
DF2C 1C 00 04 .. bset 00,x, #04 ; set link powerup error bit
+;
DF2F F6 00 21 ..! ldab 0021
DF32 C4 20 . andb #20
DF34 27 07 '. beq 07
E0DD F6 0B C0 ... ldab 0bc0
E0E0 C4 02 .. andb #02 ; have a changer
E0E2 26 03 &. bne 03
-E0E4 BD DE 15 ... jsr de15 ;dump118
+E0E4 BD DE 15 ... jsr de15 ;jump118
E0E7 F6 00 11 ... ldab 0011
E0EA C4 20 . andb #20
E0EC 26 1A &. bne 1a
E18A C4 01 .. andb #01
E18C 27 08 '. beq 08
E18E FC 10 16 ... ldd 1016
-E191 83 00 64 ..d subd #0064
+E191 83 00 64 ..d subd #0064 ; 100
E194 25 3C %< bcs 3c
E196 F6 00 15 ... ldab 0015
E199 C4 02 .. andb #02
E19B 27 08 '. beq 08
E19D FC 10 16 ... ldd 1016
-E1A0 83 00 C8 ... subd #00c8
+E1A0 83 00 C8 ... subd #00c8 ; 200
E1A3 25 2D %- bcs 2d
E1A5 F6 00 15 ... ldab 0015
E1A8 C4 04 .. andb #04
E1AA 27 08 '. beq 08
E1AC FC 10 16 ... ldd 1016
-E1AF 83 01 F4 ... subd #01f4
+E1AF 83 01 F4 ... subd #01f4 ; 500
E1B2 25 1E %. bcs 1e
E1B4 F6 00 15 ... ldab 0015
E1B7 C4 08 .. andb #08
E1B9 27 08 '. beq 08
E1BB FC 10 16 ... ldd 1016
-E1BE 83 03 E8 ... subd #03e8
+E1BE 83 03 E8 ... subd #03e8 ; 1000
E1C1 25 0F %. bcs 0f
E1C3 F6 00 15 ... ldab 0015
E1C6 C4 10 .. andb #10
E1C8 27 13 '. beq 13
E1CA FC 10 16 ... ldd 1016
-E1CD 83 07 D0 ... subd #07d0
+E1CD 83 07 D0 ... subd #07d0 ; 2000
E1D0 24 0B $. bcc 0b
E1D2 BD C0 E0 ... jsr c0e0 ;jump94
E1D5 83 00 00 ... subd #0000
E89F CC 3F FF .?. ldd #3fff
E8A2 FD 00 50 ..P std 0050
E8A5 7F 00 06 ... clr 0006
+;
E8A8 F6 00 06 ... ldab 0006
-E8AB C1 64 .d cmpb #64
-E8AD 24 64 $d bcc 64
+E8AB C1 64 .d cmpb #64 ; 100
+E8AD 24 64 $d bcc 64 ; to e913 - break
+;
E8AF F6 00 06 ... ldab 0006
E8B2 4F O clra
E8B3 CE 00 05 ... ldx #0005
E8B6 02 . idiv
E8B7 5D ] tstb
-E8B8 27 54 'T beq 54
+E8B8 27 54 'T beq 54 ; to e90e - continue
+;
E8BA F6 00 06 ... ldab 0006
E8BD BD D7 A0 ... jsr d7a0 ;is_invalid_slot
E8C0 83 00 00 ... subd #0000
-E8C3 26 49 &I bne 49
+E8C3 26 49 &I bne 49 ; continue
+;
E8C5 F6 00 06 ... ldab 0006
E8C8 4F O clra
E8C9 05 . asld
E8D4 FD 10 16 ... std 1016
E8D7 FC 10 16 ... ldd 1016
E8DA 83 27 10 .'. subd #2710 ; 10000
-E8DD 24 2F $/ bcc 2f
+E8DD 24 2F $/ bcc 2f ; to e90e - continue
E8DF F6 00 06 ... ldab 0006
-E8E2 BD D4 68 ..h jsr d468 ;jump51
+E8E2 BD D4 68 ..h jsr d468 ;jump51 - test bit 6 of array[0006] at 0800
E8E5 83 00 00 ... subd #0000
-E8E8 27 24 '$ beq 24
-E8EA BD D5 61 ..a jsr d561 ;jump42
+E8E8 27 24 '$ beq 24 ; to e90e - continue
+E8EA BD D5 61 ..a jsr d561 ;jump42 - test bit 7 of array[0006] at 0800
E8ED 83 00 00 ... subd #0000
-E8F0 26 1C &. bne 1c
+E8F0 26 1C &. bne 1c ; to e90e - continue
E8F2 FC 10 16 ... ldd 1016
E8F5 B3 00 0F ... subd 000f
E8F8 23 06 #. bls 06
E906 24 06 $. bcc 06
E908 FC 10 16 ... ldd 1016
E90B FD 00 50 ..P std 0050
+;
E90E 7C 00 06 |.. inc 0006
-E911 20 95 . bra 95
+E911 20 95 . bra 95 ; to e8a8
+;
E913 FC 0B B7 ... ldd 0bb7
E916 27 12 '. beq 12
E918 FC 00 0F ... ldd 000f
F8A1 F7 10 2D ..- stab 102d ; enable SCI transmission
F8A4 C6 03 .. ldab #03
F8A6 F7 10 2B ..+ stab 102b ; set 9600 baud
-F8A9 C6 46 .F ldab #46 ; 70
+F8A9 C6 46 .F ldab #46 ; 70 01000110
F8AB F7 00 2F ../ stab 002f
F8AE CC 07 D0 ... ldd #07d0
F8B1 BD E5 71 ..q jsr e571 ;msdelay
F9BC F6 00 1F ... ldab 001f
F9BF C4 20 . andb #20
F9C1 26 03 &. bne 03
-F9C3 7E FA 74 ~.t jmp fa74 ;goto84
+F9C3 7E FA 74 ~.t jmp fa74 ;goto84 if 001f is clear
F9C6 F6 0B C0 ... ldab 0bc0
F9C9 C4 01 .. andb #01
F9CB 27 08 '. beq 08
F9F9 1D 00 02 ... bclr 00,x, #02
F9FC F6 0B C0 ... ldab 0bc0
F9FF C4 02 .. andb #02
-FA01 27 27 '' beq 27
-FA03 C6 3C .< ldab #3c
+FA01 27 27 '' beq 27 ; to fa2a
+;
+FA03 C6 3C .< ldab #3c ; 62 00111100
FA05 F7 00 31 ..1 stab 0031
FA08 0E . cli
FA09 CC 00 FF ... ldd #00ff
FA1B F7 10 2D ..- stab 102d ; enable SCI transmission
FA1E C6 03 .. ldab #03
FA20 F7 10 2B ..+ stab 102b ; 9600 baud
-FA23 C6 46 .F ldab #46 ; 70
+FA23 C6 46 .F ldab #46 ; 70 01000110
FA25 F7 00 2F ../ stab 002f
-FA28 20 31 1 bra 31
+FA28 20 31 1 bra 31 ; to fa5b
+;
FA2A CE 00 21 ..! ldx #0021
FA2D 1D 00 40 ... bclr 00,x, #40
FA30 BD D0 94 ... jsr d094 ;jump66 - init variables
FA52 1D 00 04 ... bclr 00,x, #04
FA55 F6 00 1A ... ldab 001a
FA58 F7 30 00 .0. stab 3000 ; changer reset line low
-FA5B BD D4 79 ..y jsr d479 ;jump67
+;
+FA5B BD D4 79 ..y jsr d479 ;jump67 - query all motors?
FA5E BD E8 9A ... jsr e89a ;jump68
FA61 BD BE 69 ..i jsr be69 ;displayreset
FA64 7F 00 06 ... clr 0006
FA8D 1C 00 .. bset 00,x, #20
FA8F F6 00 12 ... ldab 0012
FA93 C4 01 .. andb #01
-FA95 26 33 &3 bne 33
+FA95 26 33 &3 bne 33 ; to faca
FA97 F6 00 1D ... ldab 001d
FA9A C4 08 .. andb #08
FA9C 27 2A '* beq 2a ; to fac8, to fad0
FA9E F6 00 1F ... ldab 001f
FAA1 C4 04 .. andb #04
-FAA3 26 14 &. bne 14
+FAA3 26 14 &. bne 14 ; to fab9
FAA5 CE 00 1F ... ldx #001f
FAA8 1C 00 04 ... bset 00,x, #04
FAAB CE 00 1F ... ldx #001f
FAC2 CE 00 1D ... ldx #001d
FAC5 1D 00 08 ... bclr 00,x, #08
FAC8 20 06 . bra 06 ; to fad0
+;
FACA CE 00 1D ... ldx #001d
FACD 1C 00 08 ... bset 00,x, #08
FAD0 F6 00 1F ... ldab 001f
git.ucc.asn.au / uccvend-snackrom.git / commitdiff
UCC git Repository :: git.ucc.asn.au