2 00000000000000d [Tegra2Vi] 0 - [0x000] = 0x00000000 (-)
3 00000000000000d [Tegra2Vi] 0 - [0x001] = 0x00000100 (-)
4 00000000000000d [Tegra2Vi] 0 - [0x002] = 0x00000000 (-)
5 00000000000000d [Tegra2Vi] 0 - [0x003] = 0x00000000 (-)
6 00000000000000d [Tegra2Vi] 0 - [0x004] = 0x00000000 (-)
7 00000000000000d [Tegra2Vi] 0 - [0x005] = 0x00000000 (-)
8 00000000000000d [Tegra2Vi] 0 - [0x006] = 0x00000000 (-)
9 00000000000000d [Tegra2Vi] 0 - [0x007] = 0x00000000 (-)
10 00000000000000d [Tegra2Vi] 0 - [0x008] = 0x00000000 (-)
11 00000000000000d [Tegra2Vi] 0 - [0x009] = 0x00000000 (-)
12 00000000000000d [Tegra2Vi] 0 - [0x00A] = 0x00000000 (-)
13 00000000000000d [Tegra2Vi] 0 - [0x00B] = 0x00000000 (-)
14 00000000000000d [Tegra2Vi] 0 - [0x00C] = 0x00000000 (-)
15 00000000000000d [Tegra2Vi] 0 - [0x00D] = 0x00000000 (-)
16 00000000000000d [Tegra2Vi] 0 - [0x00E] = 0x00000000 (-)
17 00000000000000d [Tegra2Vi] 0 - [0x00F] = 0x00000000 (-)
18 00000000000000d [Tegra2Vi] 0 - [0x010] = 0x00000000 (-)
19 00000000000000d [Tegra2Vi] 0 - [0x011] = 0x00000000 (-)
20 00000000000000d [Tegra2Vi] 0 - [0x012] = 0x00000000 (-)
21 00000000000000d [Tegra2Vi] 0 - [0x013] = 0x00000000 (-)
22 00000000000000d [Tegra2Vi] 0 - [0x014] = 0x00000000 (-)
23 00000000000000d [Tegra2Vi] 0 - [0x015] = 0x00000000 (-)
24 00000000000000d [Tegra2Vi] 0 - [0x016] = 0x00000000 (-)
25 00000000000000d [Tegra2Vi] 0 - [0x017] = 0x00000000 (-)
26 00000000000000d [Tegra2Vi] 0 - [0x018] = 0x00000000 (-)
27 00000000000000d [Tegra2Vi] 0 - [0x019] = 0x00000000 (-)
28 00000000000000d [Tegra2Vi] 0 - [0x01A] = 0x00000000 (-)
29 00000000000000d [Tegra2Vi] 0 - [0x028] = 0x0000011A (-)
30 00000000000000d [Tegra2Vi] 0 - [0x029] = 0x00000000 (-)
31 00000000000000d [Tegra2Vi] 0 - [0x02A] = 0x00000000 (-)
32 00000000000000d [Tegra2Vi] 0 - [0x02B] = 0x00000000 (-)
33 00000000000000d [Tegra2Vi] 0 - [0x02C] = 0x00000000 (-)
34 00000000000000d [Tegra2Vi] 0 - [0x02D] = 0x00000000 (-)
35 00000000000000d [Tegra2Vi] 0 - [0x02E] = 0x00000000 (-)
36 00000000000000d [Tegra2Vi] 0 - [0x02F] = 0x00000000 (-)
37 00000000000000d [Tegra2Vi] 0 - [0x030] = 0xF000F800 (-)
38 00000000000000d [Tegra2Vi] 0 - [0x031] = 0x00000000 (-)
39 00000000000000d [Tegra2Vi] 0 - [0x032] = 0x00000020 (-)
40 00000000000000d [Tegra2Vi] 0 - [0x033] = 0x00000114 (-)
41 00000000000000d [Tegra2Vi] 0 - [0x034] = 0x00000000 (-)
42 00000000000000d [Tegra2Vi] 0 - [0x035] = 0x00000000 (-)
43 00000000000000d [Tegra2Vi] 0 - [0x036] = 0x00050155 (-)
44 00000000000000d [Tegra2Vi] 0 - [0x037] = 0x00000000 (-)
45 00000000000000d [Tegra2Vi] 0 - [0x038] = 0x00000000 (-)
46 00000000000000d [Tegra2Vi] 0 - [0x039] = 0x00000000 (-)
47 00000000000000d [Tegra2Vi] 0 - [0x03A] = 0x00000000 (-)
48 00000000000000d [Tegra2Vi] 0 - [0x03B] = 0x00000000 (-)
49 00000000000000d [Tegra2Vi] 0 - [0x03C] = 0x0009060C (-)
50 00000000000000d [Tegra2Vi] 0 - [0x03D] = 0x000F021C (-)
51 00000000000000d [Tegra2Vi] 0 - [0x03E] = 0x000D0210 (-)
52 00000000000000d [Tegra2Vi] 0 - [0x03F] = 0x00000000 (-)
53 00000000000000d [Tegra2Vi] 0 - [0x040] = 0x00000000 (-)
54 00000000000000d [Tegra2Vi] 0 - [0x041] = 0x00000000 (DC_CMD_STATE_CONTROL_0)
55 00000000000000d [Tegra2Vi] 0 - [0x042] = 0x00000010 (DC_CMD_DISPLAY_WINDOW_HEADER_0)
56 00000000000000d [Tegra2Vi] 0 - [0x043] = 0x00000000 (DC_CMD_REG_ACT_CONTROL_0)
57 00000000000000d [Tegra2Vi] 0 - Display COM Registers
58 00000000000000d [Tegra2Vi] 0 - [0x300] = 0x00000000 (DC_COM_CRC_CONTROL_0)
59 00000000000000d [Tegra2Vi] 0 - [0x301] = 0x00000000 (DC_COM_CRC_CHECKSUM_0)
60 00000000000000d [Tegra2Vi] 0 - [0x302] = 0x00000000 (DC_COM_PIN_OUTPUT_ENABLE0_0)
61 00000000000000d [Tegra2Vi] 0 - [0x303] = 0x00000000 (DC_COM_PIN_OUTPUT_ENABLE1_0)
62 00000000000000d [Tegra2Vi] 0 - [0x304] = 0x00000000 (DC_COM_PIN_OUTPUT_ENABLE2_0)
63 00000000000000d [Tegra2Vi] 0 - [0x305] = 0x00000000 (DC_COM_PIN_OUTPUT_ENABLE3_0)
64 00000000000000d [Tegra2Vi] 0 - [0x306] = 0x00000000 (DC_COM_PIN_OUTPUT_POLARITY0_0)
65 00000000000000d [Tegra2Vi] 0 - [0x307] = 0x01000000 (DC_COM_PIN_OUTPUT_POLARITY1_0)
66 00000000000000d [Tegra2Vi] 0 - [0x308] = 0x00000000 (DC_COM_PIN_OUTPUT_POLARITY2_0)
67 00000000000000d [Tegra2Vi] 0 - [0x309] = 0x00000000 (DC_COM_PIN_OUTPUT_POLARITY3_0)
68 00000000000000d [Tegra2Vi] 0 - [0x30A] = 0x00000000 (DC_COM_PIN_OUTPUT_DATA0_0)
69 00000000000000d [Tegra2Vi] 0 - [0x30B] = 0x00000000 (DC_COM_PIN_OUTPUT_DATA1_0)
70 00000000000000d [Tegra2Vi] 0 - [0x30C] = 0x00000000 (DC_COM_PIN_OUTPUT_DATA2_0)
71 00000000000000d [Tegra2Vi] 0 - [0x30D] = 0x00000000 (DC_COM_PIN_OUTPUT_DATA3_0)
72 00000000000000d [Tegra2Vi] 0 - [0x30E] = 0x00000000 (DC_COM_PIN_INPUT_ENABLE0_0)
73 00000000000000d [Tegra2Vi] 0 - [0x30F] = 0x00000000 (DC_COM_PIN_INPUT_ENABLE1_0)
74 00000000000000d [Tegra2Vi] 0 - [0x310] = 0x00000000 (DC_COM_PIN_INPUT_ENABLE2_0)
75 00000000000000d [Tegra2Vi] 0 - [0x311] = 0x00000000 (DC_COM_PIN_INPUT_ENABLE3_0)
76 00000000000000d [Tegra2Vi] 0 - [0x312] = 0x00000000 (DC_COM_PIN_INPUT_DATA0_0)
77 00000000000000d [Tegra2Vi] 0 - [0x313] = 0x00000000 (DC_COM_PIN_INPUT_DATA1_0)
78 00000000000000d [Tegra2Vi] 0 - [0x314] = 0x00000000 (DC_COM_PIN_OUTPUT_SELECT0_0)
79 00000000000000d [Tegra2Vi] 0 - [0x315] = 0x00000000 (DC_COM_PIN_OUTPUT_SELECT1_0)
80 00000000000000d [Tegra2Vi] 0 - [0x316] = 0x00000000 (DC_COM_PIN_OUTPUT_SELECT2_0)
81 00000000000000d [Tegra2Vi] 0 - [0x317] = 0x00000000 (DC_COM_PIN_OUTPUT_SELECT3_0)
82 00000000000000d [Tegra2Vi] 0 - [0x318] = 0x00210222 (DC_COM_PIN_OUTPUT_SELECT4_0)
83 00000000000000d [Tegra2Vi] 0 - [0x319] = 0x00002200 (DC_COM_PIN_OUTPUT_SELECT5_0)
84 00000000000000d [Tegra2Vi] 0 - [0x31A] = 0x00020000 (DC_COM_PIN_OUTPUT_SELECT6_0)
85 00000000000000d [Tegra2Vi] 0 - [0x31B] = 0x00000000 (DC_COM_PIN_MISC_CONTROL_0)
86 00000000000000d [Tegra2Vi] 0 - [0x31C] = 0x00840152 (-)
87 00000000000000d [Tegra2Vi] 0 - [0x31D] = 0x00000144 (-)
88 00000000000000d [Tegra2Vi] 0 - [0x31E] = 0x00700111 (-)
89 00000000000000d [Tegra2Vi] 0 - [0x31F] = 0x00000077 (-)
90 00000000000000d [Tegra2Vi] 0 - [0x320] = 0x01070023 (-)
91 00000000000000d [Tegra2Vi] 0 - [0x321] = 0x0000D317 (-)
92 00000000000000d [Tegra2Vi] 0 - [0x322] = 0xEAEE54C2 (-)
93 00000000000000d [Tegra2Vi] 0 - [0x323] = 0x6BDC5DA4 (-)
94 00000000000000d [Tegra2Vi] 0 - [0x324] = 0x05004210 (-)
95 00000000000000d [Tegra2Vi] 0 - [0x325] = 0x00000000 (-)
96 00000000000000d [Tegra2Vi] 0 - [0x326] = 0x00000000 (-)
97 00000000000000d [Tegra2Vi] 0 - [0x327] = 0x00000000 (-)
98 00000000000000d [Tegra2Vi] 0 - [0x328] = 0x00000400 (-)
99 00000000000000d [Tegra2Vi] 0 - [0x329] = 0x00000000 (-)
100 00000000000000d [Tegra2Vi] 0 - Display DISP Registers
101 00000000000000d [Tegra2Vi] 0 - [0x400] = 0x00000000 (DC_DISP_DISP_SIGNAL_OPTIONS0_0)
102 00000000000000d [Tegra2Vi] 0 - [0x401] = 0x00000000 (DC_DISP_DISP_SIGNAL_OPTIONS1_0)
103 00000000000000d [Tegra2Vi] 0 - [0x402] = 0x00000000 (DC_DISP_DISP_WIN_OPTIONS_0)
104 00000000000000d [Tegra2Vi] 0 - [0x403] = 0x00000020 (DC_DISP_MEM_HIGH_PRIORITY_0)
105 00000000000000d [Tegra2Vi] 0 - [0x404] = 0x00000001 (DC_DISP_MEM_HIGH_PRIORITY_TIMER_0)
106 00000000000000d [Tegra2Vi] 0 - [0x405] = 0x00000000 (DC_DISP_DISP_TIMING_OPTIONS_0)
107 00000000000000d [Tegra2Vi] 0 - [0x406] = 0x0001000B (DC_DISP_REF_TO_SYNC_0)
108 00000000000000d [Tegra2Vi] 0 - [0x407] = 0x0004003A (DC_DISP_SYNC_WIDTH_0)
109 00000000000000d [Tegra2Vi] 0 - [0x408] = 0x0004003A (DC_DISP_BACK_PORCH_0)
110 00000000000000d [Tegra2Vi] 0 - [0x409] = 0x03000400 (DC_DISP_DISP_ACTIVE_0)
111 00000000000000d [Tegra2Vi] 0 - [0x40A] = 0x0004003A (DC_DISP_FRONT_PORCH_0)
112 00000000000000d [Tegra2Vi] 0 - [0x40B] = 0x00000918 (DC_DISP_H_PULSE0_CONTROL_0)
113 00000000000000d [Tegra2Vi] 0 - [0x40C] = 0x1D970F55 (DC_DISP_H_PULSE0_POSITION_A_0)
114 00000000000000d [Tegra2Vi] 0 - [0x40D] = 0x02AA0AC5 (DC_DISP_H_PULSE0_POSITION_B_0)
115 00000000000000d [Tegra2Vi] 0 - [0x40E] = 0x039B00AA (DC_DISP_H_PULSE0_POSITION_C_0)
116 00000000000000d [Tegra2Vi] 0 - [0x40F] = 0x044D1989 (DC_DISP_H_PULSE0_POSITION_D_0)
117 00000000000000d [Tegra2Vi] 0 - [0x410] = 0x00000480 (DC_DISP_H_PULSE1_CONTROL_0)
118 00000000000000d [Tegra2Vi] 0 - [0x411] = 0x198B1E2D (DC_DISP_H_PULSE1_POSITION_A_0)
119 00000000000000d [Tegra2Vi] 0 - [0x412] = 0x04910669 (DC_DISP_H_PULSE1_POSITION_B_0)
120 00000000000000d [Tegra2Vi] 0 - [0x413] = 0x08381FA4 (DC_DISP_H_PULSE1_POSITION_C_0)
121 00000000000000d [Tegra2Vi] 0 - [0x414] = 0x009C0625 (DC_DISP_H_PULSE1_POSITION_D_0)
122 00000000000000d [Tegra2Vi] 0 - [0x415] = 0x00000608 (DC_DISP_H_PULSE2_CONTROL_0)
123 00000000000000d [Tegra2Vi] 0 - [0x416] = 0x0C001469 (DC_DISP_H_PULSE2_POSITION_A_0)
124 00000000000000d [Tegra2Vi] 0 - [0x417] = 0x07690B17 (DC_DISP_H_PULSE2_POSITION_B_0)
125 00000000000000d [Tegra2Vi] 0 - [0x418] = 0x00360257 (DC_DISP_H_PULSE2_POSITION_C_0)
126 00000000000000d [Tegra2Vi] 0 - [0x419] = 0x1F1809D6 (DC_DISP_H_PULSE2_POSITION_D_0)
127 00000000000000d [Tegra2Vi] 0 - [0x41A] = 0x000007D0 (DC_DISP_V_PULSE0_CONTROL_0)
128 00000000000000d [Tegra2Vi] 0 - [0x41B] = 0x15CB1886 (DC_DISP_V_PULSE0_POSITION_A_0)
129 00000000000000d [Tegra2Vi] 0 - [0x41C] = 0x02401EA8 (DC_DISP_V_PULSE0_POSITION_B_0)
130 00000000000000d [Tegra2Vi] 0 - [0x41D] = 0x09750264 (DC_DISP_V_PULSE0_POSITION_C_0)
131 00000000000000d [Tegra2Vi] 0 - [0x41E] = 0x00000010 (DC_DISP_V_PULSE1_CONTROL_0)
132 00000000000000d [Tegra2Vi] 0 - [0x41F] = 0x16BA0A17 (DC_DISP_V_PULSE1_POSITION_A_0)
133 00000000000000d [Tegra2Vi] 0 - [0x420] = 0x1AE21A90 (DC_DISP_V_PULSE1_POSITION_B_0)
134 00000000000000d [Tegra2Vi] 0 - [0x421] = 0x06860AD7 (DC_DISP_V_PULSE1_POSITION_C_0)
135 00000000000000d [Tegra2Vi] 0 - [0x422] = 0x00000000 (DC_DISP_V_PULSE2_CONTROL_0)
136 00000000000000d [Tegra2Vi] 0 - [0x423] = 0x0CC31C03 (DC_DISP_V_PULSE2_POSITION_A_0)
137 00000000000000d [Tegra2Vi] 0 - [0x424] = 0x00000000 (DC_DISP_V_PULSE3_CONTROL_0)
138 00000000000000d [Tegra2Vi] 0 - [0x425] = 0x07071A0E (DC_DISP_V_PULSE3_POSITION_A_0)
139 00000000000000d [Tegra2Vi] 0 - [0x426] = 0x02960DA3 (DC_DISP_M0_CONTROL_0)
140 00000000000000d [Tegra2Vi] 0 - [0x427] = 0x1F8C1951 (DC_DISP_M1_CONTROL_0)
141 00000000000000d [Tegra2Vi] 0 - [0x428] = 0x15070003 (DC_DISP_DI_CONTROL_0)
142 00000000000000d [Tegra2Vi] 0 - [0x429] = 0x0000CEF5 (DC_DISP_PP_CONTROL_0)
143 00000000000000d [Tegra2Vi] 0 - [0x42A] = 0x10D08381 (DC_DISP_PP_SELECT_A_0)
144 00000000000000d [Tegra2Vi] 0 - [0x42B] = 0x1C2CB600 (DC_DISP_PP_SELECT_B_0)
145 00000000000000d [Tegra2Vi] 0 - [0x42C] = 0x73B3DE7D (DC_DISP_PP_SELECT_C_0)
146 00000000000000d [Tegra2Vi] 0 - [0x42D] = 0x0779CA03 (DC_DISP_PP_SELECT_D_0)
147 00000000000000d [Tegra2Vi] 0 - [0x42E] = 0x00000005 (DC_DISP_DISP_CLOCK_CONTROL_0)
148 00000000000000d [Tegra2Vi] 0 - [0x42F] = 0x00000000 (DC_DISP_DISP_INTERFACE_CONTROL_0)
149 00000000000000d [Tegra2Vi] 0 - [0x430] = 0x00000200 (DC_DISP_DISP_COLOR_CONTROL_0)
150 00000000000000d [Tegra2Vi] 0 - [0x431] = 0x00010001 (DC_DISP_SHIFT_CLOCK_OPTIONS_0)
151 00000000000000d [Tegra2Vi] 0 - [0x432] = 0x00000005 (DC_DISP_DATA_ENABLE_OPTIONS_0)
152 00000000000000d [Tegra2Vi] 0 - [0x433] = 0x00000000 (DC_DISP_SERIAL_INTERFACE_OPTIONS_0)
153 00000000000000d [Tegra2Vi] 0 - [0x434] = 0x00000000 (DC_DISP_LCD_SPI_OPTIONS_0)
154 00000000000000d [Tegra2Vi] 0 - [0x435] = 0x00DA0731 (DC_DISP_BORDER_COLOR_0)
155 00000000000000d [Tegra2Vi] 0 - [0x436] = 0x00E9B832 (DC_DISP_COLOR_KEY0_LOWER_0)
156 00000000000000d [Tegra2Vi] 0 - [0x437] = 0x006B4475 (DC_DISP_COLOR_KEY0_UPPER_0)
157 00000000000000d [Tegra2Vi] 0 - [0x438] = 0x000FA6FB (DC_DISP_COLOR_KEY1_LOWER_0)
158 00000000000000d [Tegra2Vi] 0 - [0x439] = 0x00304301 (DC_DISP_COLOR_KEY1_UPPER_0)
159 00000000000000d [Tegra2Vi] 0 - [0x43A] = 0x00000000 (_DC_DISP_UNUSED_43A)
160 00000000000000d [Tegra2Vi] 0 - [0x43B] = 0x00000000 (_DC_DISP_UNUSED_43B)
161 00000000000000d [Tegra2Vi] 0 - [0x43C] = 0x004962ED (DC_DISP_CURSOR_FOREGROUND_0)
162 00000000000000d [Tegra2Vi] 0 - [0x43D] = 0x0063462E (DC_DISP_CURSOR_BACKGROUND_0)
163 00000000000000d [Tegra2Vi] 0 - [0x43E] = 0x3021352C (DC_DISP_CURSOR_START_ADDR_0)
164 00000000000000d [Tegra2Vi] 0 - [0x43F] = 0x3021352C (DC_DISP_CURSOR_START_ADDR_NS_0)
165 00000000000000d [Tegra2Vi] 0 - [0x440] = 0x21B10B4B (DC_DISP_CURSOR_POSITION_0)
166 00000000000000d [Tegra2Vi] 0 - [0x441] = 0x21B10B4B (DC_DISP_CURSOR_POSITION_NS_0)
167 00000000000000d [Tegra2Vi] 0 - [0x442] = 0x00000030 (DC_DISP_INIT_SEQ_CONTROL_0)
168 00000000000000d [Tegra2Vi] 0 - [0x443] = 0x8C0BF46E (DC_DISP_SPI_INIT_SEQ_DATA_A_0)
169 00000000000000d [Tegra2Vi] 0 - [0x444] = 0xE08C7EBA (DC_DISP_SPI_INIT_SEQ_DATA_B_0)
170 00000000000000d [Tegra2Vi] 0 - [0x445] = 0x89A6A8FD (DC_DISP_SPI_INIT_SEQ_DATA_C_0)
171 00000000000000d [Tegra2Vi] 0 - [0x446] = 0x80D5BC36 (DC_DISP_SPI_INIT_SEQ_DATA_D_0)
172 00000000000000d [Tegra2Vi] 0 - [0x480] = 0x00000000 (DC_DISP_DC_MCCIF_FIFOCTRL_0)
173 00000000000000d [Tegra2Vi] 0 - [0x481] = 0xCF401F1F (DC_DISP_MCCIF_DISPLAY0A_HYST_0)
174 00000000000000d [Tegra2Vi] 0 - [0x482] = 0xCF081F1F (DC_DISP_MCCIF_DISPLAY0B_HYST_0)
175 00000000000000d [Tegra2Vi] 0 - [0x483] = 0xCF081F1F (DC_DISP_MCCIF_DISPLAY0C_HYST_0)
176 00000000000000d [Tegra2Vi] 0 - [0x484] = 0xCF081F1F (DC_DISP_MCCIF_DISPLAY1B_HYST_0)
177 00000000000000d [Tegra2Vi] 0 - [0x4C0] = 0x00000000 (DC_DISP_DAC_CRT_CTRL_0)
178 00000000000000d [Tegra2Vi] 0 - [0x4C1] = 0x00000002 (DC_DISP_DISP_MISC_CONTROL_0)
179 00000000000000d [Tegra2Vi] 0 - WINC_A Registers
180 00000000000000d [Tegra2Vi] 0 - [0x700] = 0x40000040 (DC_WIN_A_WIN_OPTIONS_0)
181 00000000000000d [Tegra2Vi] 0 - [0x701] = 0x00000000 (DC_WIN_A_BYTE_SWAP_0)
182 00000000000000d [Tegra2Vi] 0 - [0x702] = 0x00000000 (DC_WIN_A_BUFFER_CONTROL_0)
183 00000000000000d [Tegra2Vi] 0 - [0x703] = 0x00000006 (DC_WIN_A_COLOR_DEPTH_0)
184 00000000000000d [Tegra2Vi] 0 - [0x704] = 0x00000000 (DC_WIN_A_POSITION_0)
185 00000000000000d [Tegra2Vi] 0 - [0x705] = 0x03000400 (DC_WIN_A_SIZE_0)
186 00000000000000d [Tegra2Vi] 0 - [0x706] = 0x03000800 (DC_WIN_A_PRESCALED_SIZE_0)
187 00000000000000d [Tegra2Vi] 0 - [0x707] = 0x00000000 (DC_WIN_A_H_INITIAL_DDA_0)
188 00000000000000d [Tegra2Vi] 0 - [0x708] = 0x00000000 (DC_WIN_A_V_INITIAL_DDA_0)
189 00000000000000d [Tegra2Vi] 0 - [0x709] = 0x10051004 (DC_WIN_A_DDA_INCREMENT_0)
190 00000000000000d [Tegra2Vi] 0 - [0x70A] = 0x00000800 (DC_WIN_A_LINE_STRIDE_0)
191 00000000000000d [Tegra2Vi] 0 - [0x70B] = 0x00000000 (DC_WIN_A_BUF_STRIDE_0)
192 00000000000000d [Tegra2Vi] 0 - [0x70C] = 0x00000000 (DC_WIN_A_BUFFER_ADDR_MODE_0)
193 00000000000000d [Tegra2Vi] 0 - [0x70D] = 0x00000000 (DC_WIN_A_DV_CONTROL_0)
194 00000000000000d [Tegra2Vi] 0 - [0x70E] = 0x00000404 (DC_WIN_A_BLEND_NOKEY_0)
195 00000000000000d [Tegra2Vi] 0 - [0x70F] = 0x0000FF00 (-)
196 00000000000000d [Tegra2Vi] 0 - [0x710] = 0x0000FF00 (-)
197 00000000000000d [Tegra2Vi] 0 - [0x711] = 0x00EB0B0D (-)
198 00000000000000d [Tegra2Vi] 0 - [0x712] = 0x000C270E (-)
199 00000000000000d [Tegra2Vi] 0 - [0x713] = 0x00263E09 (-)
200 00000000000000d [Tegra2Vi] 0 - [0x714] = 0x446996C9 (-)
201 00000000000000d [Tegra2Vi] 0 - WINBUF_A
202 00000000000000d [Tegra2Vi] 0 - [0x800] = 0x1C022000 (DC_WINBUF_A_START_ADDR_0)
203 00000000000000d [Tegra2Vi] 0 - [0x801] = 0x1C022000 (DC_WINBUF_A_START_ADDR_NS_0)
204 00000000000000d [Tegra2Vi] 0 - [0x802] = 0x00000000 (-)
205 00000000000000d [Tegra2Vi] 0 - [0x803] = 0x00000000 (-)
206 00000000000000d [Tegra2Vi] 0 - [0x804] = 0x00000000 (-)
207 00000000000000d [Tegra2Vi] 0 - [0x805] = 0x00000000 (-)
208 00000000000000d [Tegra2Vi] 0 - [0x806] = 0x00000000 (DC_WINBUF_A_ADDR_H_OFFSET_0)
209 00000000000000d [Tegra2Vi] 0 - [0x807] = 0x00000000 (DC_WINBUF_A_ADDR_H_OFFSET_NS_0)
210 00000000000000d [Tegra2Vi] 0 - [0x808] = 0x00000000 (DC_WINBUF_A_ADDR_V_OFFSET_0)
211 00000000000000d [Tegra2Vi] 0 - [0x809] = 0x00000000 (DC_WINBUF_A_ADDR_V_OFFSET_NS_0)
212 00000000000000d [Tegra2Vi] 0 - [0x80A] = 0x00000000 (DC_WINBUF_A_UFLOW_STATUS)
git.ucc.asn.au / tpg / acess2.git / blob
UCC git Repository :: git.ucc.asn.au