3 * - By John Hodge (thePowersGang)
5 * Universal Host Controller Interface
8 #define VERSION VER2(0,5)
17 #define MAX_CONTROLLERS 4
21 int UHCI_Initialise(char **Arguments);
23 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont);
24 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD);
25 void *UHCI_int_SendTransaction(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
26 void *UHCI_DataIN(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
27 void *UHCI_DataOUT(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
28 void *UHCI_SendSetup(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
29 int UHCI_IsTransferComplete(void *Ptr, void *Handle);
30 int UHCI_Int_InitHost(tUHCI_Controller *Host);
31 void UHCI_CheckPortUpdate(void *Ptr);
32 void UHCI_InterruptHandler(int IRQ, void *Ptr);
34 static void _OutByte(tUHCI_Controller *Host, int Reg, Uint8 Value);
35 static void _OutWord(tUHCI_Controller *Host, int Reg, Uint16 Value);
36 static void _OutDWord(tUHCI_Controller *Host, int Reg, Uint32 Value);
37 static Uint16 _InWord(tUHCI_Controller *Host, int Reg);
40 MODULE_DEFINE(0, VERSION, USB_UHCI, UHCI_Initialise, NULL, "USB_Core", NULL);
41 tUHCI_TD gaUHCI_TDPool[NUM_TDs];
42 tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];
43 tUSBHostDef gUHCI_HostDef = {
44 .SendIN = UHCI_DataIN,
45 .SendOUT = UHCI_DataOUT,
46 .SendSETUP = UHCI_SendSetup,
47 .CheckPorts = UHCI_CheckPortUpdate,
48 .IsOpComplete = UHCI_IsTransferComplete
53 * \fn int UHCI_Initialise()
54 * \brief Called to initialise the UHCI Driver
56 int UHCI_Initialise(char **Arguments)
63 // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices
64 while( (id = PCI_GetDeviceByClass(0x0C0300, 0xFFFFFF, id)) >= 0 && i < MAX_CONTROLLERS )
66 tUHCI_Controller *cinfo = &gUHCI_Controllers[i];
68 // NOTE: Check "protocol" from PCI?
71 base_addr = PCI_GetBAR(id, 4);
75 cinfo->IOBase = base_addr & ~1;
76 cinfo->MemIOMap = NULL;
80 cinfo->MemIOMap = (void*)MM_MapHWPages(base_addr, 1);
82 cinfo->IRQNum = PCI_GetIRQ(id);
84 Log_Debug("UHCI", "Controller PCI #%i: IO Base = 0x%x, IRQ %i",
85 id, base_addr, cinfo->IRQNum);
87 IRQ_AddHandler(cinfo->IRQNum, UHCI_InterruptHandler, cinfo);
90 ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);
97 cinfo->RootHub = USB_RegisterHost(&gUHCI_HostDef, cinfo, 2);
98 LOG("cinfo->RootHub = %p", cinfo->RootHub);
104 LEAVE('i', MODULE_ERR_NOTNEEDED);
105 return MODULE_ERR_NOTNEEDED;
108 if(i == MAX_CONTROLLERS) {
109 Log_Warning("UHCI", "Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");
111 LEAVE('i', MODULE_ERR_OK);
112 return MODULE_ERR_OK;
116 * \fn void UHCI_Cleanup()
117 * \brief Called just before module is unloaded
123 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont)
126 for(i = 0; i < NUM_TDs; i ++)
128 if(gaUHCI_TDPool[i].Link == 0) {
129 gaUHCI_TDPool[i].Link = 1;
130 gaUHCI_TDPool[i].Control = 1 << 23;
131 return &gaUHCI_TDPool[i];
133 // Still in use? Skip
134 if( gaUHCI_TDPool[i].Control & (1 << 23) )
136 // Is there a callback on it? Skip
137 if( gaUHCI_TDPool[i]._info.Callback )
139 // TODO: Garbage collect, but that means removing from the list too
141 // Ok, this is actually unused
142 gaUHCI_TDPool[i].Link = 1;
143 gaUHCI_TDPool[i].Control = 1 << 23;
144 return &gaUHCI_TDPool[i];
150 tUHCI_TD *UHCI_int_GetTDFromPhys(tPAddr PAddr)
152 // TODO: Fix this to work with a non-contiguous pool
153 static tPAddr td_pool_base;
154 if(!td_pool_base) td_pool_base = MM_GetPhysAddr( (tVAddr)gaUHCI_TDPool );
155 return gaUHCI_TDPool + (PAddr - td_pool_base) / sizeof(gaUHCI_TDPool[0]);
158 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD)
160 int next_frame = (_InWord(Cont, FRNUM) + 2) & (1024-1);
164 // TODO: How to handle FRNUM incrementing while we are in this function?
167 if( Cont->FrameList[next_frame] & 1 )
169 // TODO: Ensure 32-bit paddr
170 Cont->FrameList[next_frame] = MM_GetPhysAddr( (tVAddr)TD );
171 TD->Control |= (1 << 24); // Ensure that there is an interrupt for each used frame
172 LOG("next_frame = %i", next_frame);
176 // Find the end of the list
177 link = Cont->FrameList[next_frame];
179 prev_td = UHCI_int_GetTDFromPhys(link);
180 link = prev_td->Link;
181 } while( !(link & 1) );
184 prev_td->Link = MM_GetPhysAddr( (tVAddr)TD );
186 LOG("next_frame = %i, prev_td = %p", next_frame, prev_td);
190 * \brief Send a transaction to the USB bus
191 * \param Cont Controller pointer
192 * \param Addr Function Address * 16 + Endpoint
193 * \param bTgl Data toggle value
195 void *UHCI_int_SendTransaction(
196 tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl,
197 tUSBHostCb Cb, void *CbData, void *Data, size_t Length)
201 if( Length > 0x400 ) return NULL; // Controller allows up to 0x500, but USB doesn't
203 td = UHCI_int_AllocateTD(Cont);
206 // TODO: Wait for one to free?
207 Log_Error("UHCI", "No avaliable TDs, transaction dropped");
212 td->Control = (Length - 1) & 0x7FF;
213 td->Control |= (1 << 23);
214 td->Token = ((Length - 1) & 0x7FF) << 21;
215 td->Token |= (bTgl & 1) << 19;
216 td->Token |= (Addr & 0xF) << 15;
217 td->Token |= ((Addr/16) & 0xFF) << 8;
220 // TODO: Ensure 32-bit paddr
221 if( ((tVAddr)Data & (PAGE_SIZE-1)) + Length > PAGE_SIZE ) {
222 Log_Warning("UHCI", "TODO: Support non single page transfers (%x + %x > %x)",
223 (tVAddr)Data & (PAGE_SIZE-1), Length, PAGE_SIZE
225 // TODO: Need to enable IOC to copy the data back
226 // td->BufferPointer =
227 td->_info.bCopyData = 1;
231 td->BufferPointer = MM_GetPhysAddr( (tVAddr)Data );
232 td->_info.bCopyData = 0;
235 // Interrupt on completion
237 td->Control |= (1 << 24);
238 LOG("IOC Cb=%p CbData=%p", Cb, CbData);
239 td->_info.Callback = Cb; // NOTE: if ERRPTR then the TD is kept allocated until checked
240 td->_info.CallbackPtr = CbData;
243 td->_info.DataPtr = Data;
245 UHCI_int_AppendTD(Cont, td);
250 void *UHCI_DataIN(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
252 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0x69, DataTgl, Cb, CbData, Buf, Length);
255 void *UHCI_DataOUT(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
257 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0xE1, DataTgl, Cb, CbData, Buf, Length);
260 void *UHCI_SendSetup(void *Ptr, int Fcn, int Endpt, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
262 return UHCI_int_SendTransaction(Ptr, Fcn*16+Endpt, 0x2D, DataTgl, Cb, CbData, Buf, Length);
265 int UHCI_IsTransferComplete(void *Ptr, void *Handle)
267 tUHCI_TD *td = Handle;
269 ret = !(td->Control & (1 << 23));
271 td->_info.Callback = NULL;
277 // === INTERNAL FUNCTIONS ===
279 * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)
280 * \brief Initialises a UHCI host controller
281 * \param Host Pointer - Host to initialise
283 int UHCI_Int_InitHost(tUHCI_Controller *Host)
285 ENTER("pHost", Host);
287 _OutWord( Host, USBCMD, 4 ); // GRESET
288 // TODO: Wait for at least 10ms
289 _OutWord( Host, USBCMD, 0 ); // GRESET
291 // Allocate Frame List
292 // - 1 Page, 32-bit address
293 // - 1 page = 1024 4 byte entries
294 Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
295 if( !Host->FrameList ) {
296 Log_Warning("UHCI", "Unable to allocate frame list, aborting");
300 LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);
301 memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)
303 //! \todo Properly fill frame list
305 // Set frame length to 1 ms
306 _OutByte( Host, SOFMOD, 64 );
309 _OutDWord( Host, FLBASEADD, Host->PhysFrameList );
310 _OutWord( Host, FRNUM, 0 );
313 _OutWord( Host, USBINTR, 0x000F );
314 PCI_ConfigWrite( Host->PciId, 0xC0, 2, 0x2000 );
317 _OutWord( Host, USBCMD, 0x0001 );
323 void UHCI_CheckPortUpdate(void *Ptr)
325 tUHCI_Controller *Host = Ptr;
327 for( int i = 0; i < 2; i ++ )
329 int port = PORTSC1 + i*2;
332 status = _InWord(Host, port);
333 // Check for port change
334 if( !(status & 0x0002) ) continue;
335 _OutWord(Host, port, 0x0002);
337 // Check if the port is connected
340 // Tell the USB code it's gone.
341 USB_DeviceDisconnected(Host->RootHub, i);
346 LOG("Port %i has something", i);
347 // Reset port (set bit 9)
349 _OutWord(Host, port, 0x0200);
350 Time_Delay(50); // 50ms delay
351 _OutWord(Host, port, _InWord(Host, port) & ~0x0200);
354 Time_Delay(50); // 50ms delay
355 _OutWord(Host, port, _InWord(Host, port) | 0x0004);
356 // Tell USB there's a new device
357 USB_DeviceConnected(Host->RootHub, i);
362 void UHCI_InterruptHandler(int IRQ, void *Ptr)
364 tUHCI_Controller *Host = Ptr;
365 int frame = (_InWord(Host, FRNUM) - 1) & 0x3FF;
366 Uint16 status = _InWord(Host, USBSTS);
367 // Log_Debug("UHCI", "UHIC Interrupt, status = 0x%x, frame = %i", status, frame);
369 // Interrupt-on-completion
374 for( int i = 0; i < 10; i ++ )
376 link = Host->FrameList[frame];
377 Host->FrameList[frame] = 1;
380 tUHCI_TD *td = UHCI_int_GetTDFromPhys(link);
381 int byte_count = (td->Control&0x7FF)+1;
382 LOG("link = 0x%x, td = %p, byte_count = %i", link, td, byte_count);
383 // Handle non-page aligned destination
384 // TODO: This will break if the destination is not in global memory
385 if(td->_info.bCopyData)
387 void *ptr = (void*)MM_MapTemp(td->BufferPointer);
388 memcpy(td->_info.DataPtr, ptr, byte_count);
389 MM_FreeTemp((tVAddr)ptr);
392 if(td->_info.Callback && td->_info.Callback != INVLPTR)
394 LOG("Calling cb %p", td->_info.Callback);
395 td->_info.Callback(td->_info.CallbackPtr, td->_info.DataPtr, byte_count);
396 td->_info.Callback = NULL;
399 if( td->_info.Callback != INVLPTR )
409 // Host->LastCleanedFrame = frame;
412 LOG("status = 0x%02x", status);
413 _OutWord(Host, USBSTS, status);
416 void _OutByte(tUHCI_Controller *Host, int Reg, Uint8 Value)
419 ((Uint8*)Host->MemIOMap)[Reg] = Value;
421 outb(Host->IOBase + Reg, Value);
424 void _OutWord(tUHCI_Controller *Host, int Reg, Uint16 Value)
427 Host->MemIOMap[Reg/2] = Value;
429 outw(Host->IOBase + Reg, Value);
432 void _OutDWord(tUHCI_Controller *Host, int Reg, Uint32 Value)
435 ((Uint32*)Host->MemIOMap)[Reg/4] = Value;
437 outd(Host->IOBase + Reg, Value);
440 Uint16 _InWord(tUHCI_Controller *Host, int Reg)
443 return Host->MemIOMap[Reg/2];
445 return inw(Host->IOBase + Reg);