-8E61 8E 7B 00 00 .{.. ; array data for jump25
-8E65 8E 81 00 01 ....
-8E69 8E 87 00 04 ....
-8E6D 8F 01 00 05 ....
-8E71 8F 09 00 01 ....
-8E75 8F 0C FF F5 ....
+8E61 8E 7B 00 00 .{.. ; no key
+8E65 8E 81 00 01 .... ; key 1 - toggle?
+8E69 8E 87 00 04 .... ; key 5 - save and next
+8E6D 8F 01 00 05 .... ; key 0 - exit
+8E71 8F 09 00 01 .... ; key reset - exit
+8E75 8F 0C FF F5 .... ; default
8EA7 F6 00 67 ..g ldab 0067
8EAA C4 02 .. andb #02
8EAC 26 08 &. bne 08
8EAE F6 00 48 ..H ldab 0048
8EB1 CB 02 .. addb #02
8EB3 F7 00 48 ..H stab 0048
8EA7 F6 00 67 ..g ldab 0067
8EAA C4 02 .. andb #02
8EAC 26 08 &. bne 08
8EAE F6 00 48 ..H ldab 0048
8EB1 CB 02 .. addb #02
8EB3 F7 00 48 ..H stab 0048
8EF3 7F 00 48 ..H clr 0048
8EF6 F6 0B C0 ... ldab 0bc0
8EF9 F7 00 67 ..g stab 0067
8EF3 7F 00 48 ..H clr 0048
8EF6 F6 0B C0 ... ldab 0bc0
8EF9 F7 00 67 ..g stab 0067
9551 CC B0 B8 ... ldd #b0b8 ; "SELECTION?"
9554 BD C0 BA ... jsr c0ba ;display:
9557 CE 00 19 ... ldx #0019
9551 CC B0 B8 ... ldd #b0b8 ; "SELECTION?"
9554 BD C0 BA ... jsr c0ba ;display:
9557 CE 00 19 ... ldx #0019
-955A 1D 00 .. bclr add,x 00,x
-955C 80 CE .. suba #ce
-955E 00 . test
-955F 1D 1D 00 ... bclr 1d,x, #00
-9562 80 7F .. suba #7f
-9564 00 . test
-9565 54 T lsrb
+955A 1D 00 80 .. bclr 00,x, #80
+955D CE 00 1D .. ldx #001d
+9560 1D 00 80 ... bclr 00,x, #80
+9562 7F 00 54 .. clr 0054
-95E7 1C 00 .. bset add,x 00,x
-95E9 80 7F .. suba #7f
-95EB 00 . test
-95EC 3A : abx
+95E7 1C 00 80 .. bset 00,x, #80
+95E9 7F 00 3A .. clr 003a
95ED BD BE 01 ... jsr be01 ;jump70
95F0 7C 00 54 |.T inc 0054
95F3 F6 00 54 ..T ldab 0054
95ED BD BE 01 ... jsr be01 ;jump70
95F0 7C 00 54 |.T inc 0054
95F3 F6 00 54 ..T ldab 0054
9638 CE 00 1F ... ldx #001f
963B 1D 00 40 ... bclr 00,x, #40
963E 7F 00 2C .., clr 002c
9638 CE 00 1F ... ldx #001f
963B 1D 00 40 ... bclr 00,x, #40
963E 7F 00 2C .., clr 002c
-9649 1D 00 .. bclr add,x 00,x
-964B 80 CE .. suba #ce
-964D 00 . test
-964E 19 . daa
-964F 1C 00 .. bset add,x 00,x
-9651 80 20 . suba #20
-9653 06 . tap
+9649 1D 00 80 .. bclr 00,x, #80
+964C CE 00 19 .. ldx #0019
+964F 1C 00 80 .. bset 00,x, #80
+9652 20 06 . bra 06
965D 00 . test
965E 1D 2C ., bclr add,x 2c,x
9660 26 BD &. bne bd
965D 00 . test
965E 1D 2C ., bclr add,x 2c,x
9660 26 BD &. bne bd
-9C1F 00 . test
-9C20 00 . test
-9C21 00 . test
-9C22 0A . clv
-9C23 9D 29 9C .). jsr 29
-9C26 3B ; rti
-9C27 9C 53 9C .S. cmpx 53
-9C2A 6B k illegal
-9C2B 9C 83 9C ... cmpx 83
-9C2E 9B 9C B2 ... adda 9c
-9C31 9C C9 9C ... cmpx c9
-9C34 E0 9C .. subb 9c,x
-9C36 F7 9D 0E ... stab 9d0e
-9C39 9D 23 F6 .#. jsr 23
-9C3C 00 . test
-9C3D 67 C4 g. asr c4,x
-9C3F 02 . idiv
+9C1F 00 00 00 0A . 0..10
+9C23 9D 29 .). ;
+9C25 9C 3B ; ;
+9C27 9C 53 .S. ;
+9C29 9C 6B k ;
+9C2B 9C 83 ... ;
+9C2D 9C 9B ... ;
+9C2F 9C B2 ... ;
+9C31 9C C9 ... ;
+9C33 9C E0 ... ;
+9C35 9C F7 .. ;
+9C37 9D 0E ... ;
+9C39 9D 23 .#. ;
+9C3B F6 00 67 . ldab 0067
+9C3D C4 02 g. andb #02
9C4A CC AF 0B ... ldd #af0b ; "LNK MSTR N"
9C4D BD C0 BA ... jsr c0ba ;display:
9C50 7E 9D 29 ~.) jmp 9d29 ;goto18
9C4A CC AF 0B ... ldd #af0b ; "LNK MSTR N"
9C4D BD C0 BA ... jsr c0ba ;display:
9C50 7E 9D 29 ~.) jmp 9d29 ;goto18
9C62 CC AF 4D ..M ldd #af4d ; "PRC HOLD N"
9C65 BD C0 BA ... jsr c0ba ;display:
9C68 7E 9D 29 ~.) jmp 9d29 ;goto18
9C62 CC AF 4D ..M ldd #af4d ; "PRC HOLD N"
9C65 BD C0 BA ... jsr c0ba ;display:
9C68 7E 9D 29 ~.) jmp 9d29 ;goto18
9C7A CC AF 63 ..c ldd #af63 ; "PRC DISP N"
9C7D BD C0 BA ... jsr c0ba ;display:
9C80 7E 9D 29 ~.) jmp 9d29 ;goto18
9C7A CC AF 63 ..c ldd #af63 ; "PRC DISP N"
9C7D BD C0 BA ... jsr c0ba ;display:
9C80 7E 9D 29 ~.) jmp 9d29 ;goto18
; lower 8-bits of D - byte to write to display.
; bytes with bit 7 unset are characters (0-127)
; bytes with bit 7 set are control commands.
; lower 8-bits of D - byte to write to display.
; bytes with bit 7 unset are characters (0-127)
; bytes with bit 7 set are control commands.
BE69 CE 10 00 ... ldx #1000
BE6C 1D 00 80 .. bclr x,#80
BE6F BD E5 96 ... jsr e596 ;jump115 - 100ms delay
BE69 CE 10 00 ... ldx #1000
BE6C 1D 00 80 .. bclr x,#80
BE6F BD E5 96 ... jsr e596 ;jump115 - 100ms delay
BE72 CE 10 00 ... ldx #1000
BE75 1C 00 80 .. bset 00,x, #80
BE72 CE 10 00 ... ldx #1000
BE75 1C 00 80 .. bset 00,x, #80
BE78 CE 10 28 ... ldx #1028
BE7B 1C 00 40 ... bset 00,x, #40
BE78 CE 10 28 ... ldx #1028
BE7B 1C 00 40 ... bset 00,x, #40
BE97 CE 10 28 ..( ldx #1028
BE9A 1D 00 40 ... bclr 00,x, #40
BE9D 39 9 rts
BE97 CE 10 28 ..( ldx #1028
BE9A 1D 00 40 ... bclr 00,x, #40
BE9D 39 9 rts
C0FE CE 00 14 ... ldx #0014
C101 1C 00 01 ... bset 00,x, #01
C104 F6 00 14 ... ldab 0014
C0FE CE 00 14 ... ldx #0014
C101 1C 00 01 ... bset 00,x, #01
C104 F6 00 14 ... ldab 0014
-C318 1D 00 .. bclr add,x 00,x
-C31A 1F CE 00 1D .... brclr ce,x 00 1d
-;goto34
-; c31b???
-C31E 1D 00 .. bclr add,x 00,x
-C320 20 CC . bra cc
-C322 00 . test
-C323 01 . nop
+C318 1D 00 1F .. bclr 00,x, #1f
+goto34:
+C31B CE 00 1D ... ldx #001d
+C31E 1D 00 20 .. bclr 00,x, #20
+C320 CC 00 01 . ldd #0001
C69F CC 00 14 ... ldd #0014
C6A2 BD E5 71 ..q jsr e571 ;msdelay
C6A5 F6 0B C0 ... ldab 0bc0
C69F CC 00 14 ... ldd #0014
C6A2 BD E5 71 ..q jsr e571 ;msdelay
C6A5 F6 0B C0 ... ldab 0bc0
C6AA 27 06 '. beq 06
C6AC CE 0B C1 ... ldx #0bc1
C6AF 1C 00 01 ... bset 00,x, #01 ; set changer powerup error bit
C6AA 27 06 '. beq 06
C6AC CE 0B C1 ... ldx #0bc1
C6AF 1C 00 01 ... bset 00,x, #01 ; set changer powerup error bit
C81D F6 0B C0 ... ldab 0bc0
C820 C4 01 .. andb #01 ; do we have a dumb mech?
C822 26 0A &. bne 0a ; if so, to c82e
C81D F6 0B C0 ... ldab 0bc0
C820 C4 01 .. andb #01 ; do we have a dumb mech?
C822 26 0A &. bne 0a ; if so, to c82e
C833 F6 10 2E ... ldab 102e ; SCI status
C836 C4 02 .. andb #02 ; test for Framing Error
C838 26 0B &. bne 0b ; if so, to c845
C833 F6 10 2E ... ldab 102e ; SCI status
C836 C4 02 .. andb #02 ; test for Framing Error
C838 26 0B &. bne 0b ; if so, to c845
goto44:
CBFF F6 0B C0 ... ldab 0bc0 ; do we have a changer?
CC02 C4 02 .. andb #02
CC04 26 03 &. bne 03 ; if so, swallow & exit
CC06 7E CE 3B ~.; jmp ce3b ; goto54 - swallow a byte & exit
goto44:
CBFF F6 0B C0 ... ldab 0bc0 ; do we have a changer?
CC02 C4 02 .. andb #02
CC04 26 03 &. bne 03 ; if so, swallow & exit
CC06 7E CE 3B ~.; jmp ce3b ; goto54 - swallow a byte & exit
CC1D 1C 00 02 ... bset 00,x, #02
CC20 F6 10 2E ... ldab 102e ; SCI status
CC23 C4 02 .. andb #02 ; test for Framing Error
CC1D 1C 00 02 ... bset 00,x, #02
CC20 F6 10 2E ... ldab 102e ; SCI status
CC23 C4 02 .. andb #02 ; test for Framing Error
DE5D CE 00 1B ... ldx #001b
DE60 1D 00 01 ... bclr 00,x, #01
DE63 7F 00 4F ..O clr 004f
DE5D CE 00 1B ... ldx #001b
DE60 1D 00 01 ... bclr 00,x, #01
DE63 7F 00 4F ..O clr 004f
DE8D FC 00 44 ..D ldd 0044
DE90 B3 0B B7 ... subd 0bb7
DE93 F3 00 44 ..D addd 0044
DE96 FD 00 44 ..D std 0044
DE8D FC 00 44 ..D ldd 0044
DE90 B3 0B B7 ... subd 0bb7
DE93 F3 00 44 ..D addd 0044
DE96 FD 00 44 ..D std 0044
DE9B CE 00 1B ... ldx #001b
DE9E 1D 00 01 ... bclr 00,x, #01
DEA1 7F 00 4F ..O clr 004f
DE9B CE 00 1B ... ldx #001b
DE9E 1D 00 01 ... bclr 00,x, #01
DEA1 7F 00 4F ..O clr 004f
DEFF BD C6 7D ..} jsr c67d ;jump124 - chat to changer
DF02 BD D6 6B ..k jsr d66b ;jump107 - chat to bill acceptor
DF05 BD DC A3 ... jsr dca3 ;jump29
DEFF BD C6 7D ..} jsr c67d ;jump124 - chat to changer
DF02 BD D6 6B ..k jsr d66b ;jump107 - chat to bill acceptor
DF05 BD DC A3 ... jsr dca3 ;jump29
DF1D CC 00 FF ... ldd #00ff
DF20 BD C7 E7 ... jsr c7e7 ;jump37 - send to serial port
DF23 CE 00 1B ... ldx #001b
DF26 1C 00 02 .. bset 00,x, #02
DF29 CE 0B C1 ... ldx #0bc1
DF2C 1C 00 04 .. bset 00,x, #04 ; set link powerup error bit
DF1D CC 00 FF ... ldd #00ff
DF20 BD C7 E7 ... jsr c7e7 ;jump37 - send to serial port
DF23 CE 00 1B ... ldx #001b
DF26 1C 00 02 .. bset 00,x, #02
DF29 CE 0B C1 ... ldx #0bc1
DF2C 1C 00 04 .. bset 00,x, #04 ; set link powerup error bit
E0F3 26 13 &. bne 13
E0F5 FC 00 40 ..@ ldd 0040
E0F8 F3 00 3E ..> addd 003e
E0FB B3 00 44 ..D subd 0044
E0FE 25 08 %. bcs 08
E100 F6 0B C0 ... ldab 0bc0
E0F3 26 13 &. bne 13
E0F5 FC 00 40 ..@ ldd 0040
E0F8 F3 00 3E ..> addd 003e
E0FB B3 00 44 ..D subd 0044
E0FE 25 08 %. bcs 08
E100 F6 0B C0 ... ldab 0bc0
E105 BD DA 64 ..d jsr da64 ;jump122
E108 FC 00 40 ..@ ldd 0040
E10B F3 00 3E ..> addd 003e
E10E B3 00 44 ..D subd 0044
E111 24 50 $P bcc 50
E113 F6 0B C0 ... ldab 0bc0
E105 BD DA 64 ..d jsr da64 ;jump122
E108 FC 00 40 ..@ ldd 0040
E10B F3 00 3E ..> addd 003e
E10E B3 00 44 ..D subd 0044
E111 24 50 $P bcc 50
E113 F6 0B C0 ... ldab 0bc0
E15D F7 00 2C .., stab 002c
E160 7E E5 5E ~.^ jmp e55e ;goto74
E163 F6 0B C0 ... ldab 0bc0
E15D F7 00 2C .., stab 002c
E160 7E E5 5E ~.^ jmp e55e ;goto74
E163 F6 0B C0 ... ldab 0bc0
E35A 26 08 &. bne 08
E35C CE 00 21 ..! ldx #0021
E35F 1C 00 .. bset add,x 00,x
E35A 26 08 &. bne 08
E35C CE 00 21 ..! ldx #0021
E35F 1C 00 .. bset add,x 00,x
E382 27 3E '> beq 3e
E384 CE 00 17 ... ldx #0017
E387 1C 00 01 ... bset 00,x, #01
E382 27 3E '> beq 3e
E384 CE 00 17 ... ldx #0017
E387 1C 00 01 ... bset 00,x, #01
E42C 1D 00 .. bclr add,x 00,x
E42E 80 39 .9 suba #39
E430 F6 0B C0 ... ldab 0bc0
E42C 1D 00 .. bclr add,x 00,x
E42E 80 39 .9 suba #39
E430 F6 0B C0 ... ldab 0bc0
E89F CC 3F FF .?. ldd #3fff
E8A2 FD 00 50 ..P std 0050
E8A5 7F 00 06 ... clr 0006
E89F CC 3F FF .?. ldd #3fff
E8A2 FD 00 50 ..P std 0050
E8A5 7F 00 06 ... clr 0006
E8BA F6 00 06 ... ldab 0006
E8BD BD D7 A0 ... jsr d7a0 ;is_invalid_slot
E8C0 83 00 00 ... subd #0000
E8BA F6 00 06 ... ldab 0006
E8BD BD D7 A0 ... jsr d7a0 ;is_invalid_slot
E8C0 83 00 00 ... subd #0000
E8D4 FD 10 16 ... std 1016
E8D7 FC 10 16 ... ldd 1016
E8DA 83 27 10 .'. subd #2710 ; 10000
E8D4 FD 10 16 ... std 1016
E8D7 FC 10 16 ... ldd 1016
E8DA 83 27 10 .'. subd #2710 ; 10000
F8AB F7 00 2F ../ stab 002f
F8AE CC 07 D0 ... ldd #07d0
F8B1 BD E5 71 ..q jsr e571 ;msdelay
F8AB F7 00 2F ../ stab 002f
F8AE CC 07 D0 ... ldd #07d0
F8B1 BD E5 71 ..q jsr e571 ;msdelay
F9F9 1D 00 02 ... bclr 00,x, #02
F9FC F6 0B C0 ... ldab 0bc0
F9FF C4 02 .. andb #02
F9F9 1D 00 02 ... bclr 00,x, #02
F9FC F6 0B C0 ... ldab 0bc0
F9FF C4 02 .. andb #02
FA2A CE 00 21 ..! ldx #0021
FA2D 1D 00 40 ... bclr 00,x, #40
FA30 BD D0 94 ... jsr d094 ;jump66 - init variables
FA2A CE 00 21 ..! ldx #0021
FA2D 1D 00 40 ... bclr 00,x, #40
FA30 BD D0 94 ... jsr d094 ;jump66 - init variables
FA52 1D 00 04 ... bclr 00,x, #04
FA55 F6 00 1A ... ldab 001a
FA58 F7 30 00 .0. stab 3000 ; changer reset line low
FA52 1D 00 04 ... bclr 00,x, #04
FA55 F6 00 1A ... ldab 001a
FA58 F7 30 00 .0. stab 3000 ; changer reset line low
FA5E BD E8 9A ... jsr e89a ;jump68
FA61 BD BE 69 ..i jsr be69 ;displayreset
FA64 7F 00 06 ... clr 0006
FA5E BD E8 9A ... jsr e89a ;jump68
FA61 BD BE 69 ..i jsr be69 ;displayreset
FA64 7F 00 06 ... clr 0006
FA8D 1C 00 .. bset 00,x, #20
FA8F F6 00 12 ... ldab 0012
FA93 C4 01 .. andb #01
FA8D 1C 00 .. bset 00,x, #20
FA8F F6 00 12 ... ldab 0012
FA93 C4 01 .. andb #01
FA97 F6 00 1D ... ldab 001d
FA9A C4 08 .. andb #08
FA9C 27 2A '* beq 2a ; to fac8, to fad0
FA9E F6 00 1F ... ldab 001f
FAA1 C4 04 .. andb #04
FA97 F6 00 1D ... ldab 001d
FA9A C4 08 .. andb #08
FA9C 27 2A '* beq 2a ; to fac8, to fad0
FA9E F6 00 1F ... ldab 001f
FAA1 C4 04 .. andb #04
FAA5 CE 00 1F ... ldx #001f
FAA8 1C 00 04 ... bset 00,x, #04
FAAB CE 00 1F ... ldx #001f
FAA5 CE 00 1F ... ldx #001f
FAA8 1C 00 04 ... bset 00,x, #04
FAAB CE 00 1F ... ldx #001f
FAC2 CE 00 1D ... ldx #001d
FAC5 1D 00 08 ... bclr 00,x, #08
FAC8 20 06 . bra 06 ; to fad0
FAC2 CE 00 1D ... ldx #001d
FAC5 1D 00 08 ... bclr 00,x, #08
FAC8 20 06 . bra 06 ; to fad0
FACA CE 00 1D ... ldx #001d
FACD 1C 00 08 ... bset 00,x, #08
FAD0 F6 00 1F ... ldab 001f
FACA CE 00 1D ... ldx #001d
FACD 1C 00 08 ... bset 00,x, #08
FAD0 F6 00 1F ... ldab 001f