_uart_regs[UART_INT_ENABLE] =
IE_RECEIVER_READY | IE_TRANSMITTER_READY | IE_LINE_STATUS_CHANGE;
- /* Use the FIFO and empty them */
+ /* Enable the FIFO and empty them */
_uart_regs[UART_FIFO_CTL] =
FIFO_ENABLE | FIFO_RX_CLEAR | FIFO_TX_CLEAR | FIFO_LVL_1;
* End of interrupt handler
*/
+void send_ack() {
+ wait_for_tx_free();
+ tx_buffer[0] = '!';
+ tx_buffer[1] = '\n';
+ tx_buffer[2] = 0;
+ send_packet();
+}
+
+void send_nack() {
+ wait_for_tx_free();
+ tx_buffer[0] = '?';
+ tx_buffer[1] = '\n';
+ tx_buffer[2] = 0;
+ send_packet();
+}
+
/* sends the packet in tx_buffer and doesn't return until it's been sent */
void send_packet() {
bset((void*)&tx_queue_state, 0x01);